CDC 6000 series
Encyclopedia
The CDC 6000 series was a family of mainframe computer
s manufactured by Control Data Corporation
in the 1960s. It consisted of CDC 6400
, CDC 6500, CDC 6600
and CDC 6700 computers, which all were extremely rapid and efficient for their time. Each was a large, solid-state, general-purpose, digital computer that performed scientific and business data processing as well as multiprogramming
, multiprocessing
, time-sharing
, and data management
tasks under the control of the operating system
called SCOPE (Supervisory Control Of Program Execution).
The CDC 6000 series computer is composed of four main functional devices: the central memory, one or two high speed central processors, seven to ten peripheral processors, and a display console. The four computer types differ primarily in the number of and kind of central processor. It had a distributed architecture and was a reduced instruction set (RISC) machine many years before such a term was invented.
CDC 6600
, designed by Seymour Cray
and James E. Thornton in Chippewa Falls, Wisconsin
. It was introduced in September, 1964 and performed up to three million instructions per second, three times faster than the IBM Stretch, the speed champ for the previous couple of years. It remained the fastest machine for five years until the CDC 7600
was launched. The machine was Freon refrigerant cooled. Control Data manufactured about 100 machines of this type, selling for $6 to $10 million each.
The next system to be introduced was the CDC 6400
, delivered in April, 1966. The 6400 central processor was a slower, less expensive, implementation with serial processing, rather than the 6600s parallel functional units. All other aspects of the 6400 were identical to the 6600. Then followed a machine with dual 6400-style central processors, the CDC 6500, designed principally by James E. Thornton, in October, 1967. And finally, the CDC 6700, with both a 6600-style CPU and a 6400-style CPU, was released in October, 1969.
Subsequent modifications to the series in 1969 included the extension to 20 peripheral and control processors with 24 channels. (During 1971-73, Control Data's Software Research Lab operated internally a 6600 machine with 30 PP's, but this was never sold commercially.) Control Data also marketed a CDC 6400 with a smaller number of peripheral processors, the CDC 6415-7 with 7 peripheral processors to reduce cost.
A 6000 series CPU contained 24 operating registers, designated X0-X7, A0-A7, and B0-B7. The eight X registers were each 60 bits
long, and used for most data manipulation—both integer and floating point. The eight B registers were 18 bits
long, and generally used for indexing and address storage. Register B0 was hard-wired to always return 0. By software convention, register B1 was generally set to 1. (This often allowed the use of 15-bit instructions instead of 30-bit instructions.) The eight 18-bit A registers were 'coupled' to their corresponding X registers in an interesting way: setting an address into any of registers A1 through A5 caused a memory load of the contents of that address into the corresponding X registers. Likewise, setting an address into registers A6 and A7 caused a memory store into that location in memory. Registers A0 and X0 were not coupled in this way, so could be used as scratch registers. However A0 and X0 were used when addressing CDCs Extended Core Storage (ECS).
Instructions were either 15 or 30 bits long, so there could be up to 4 instructions per 60-bit
word. The op codes were 6 bits long. The remainder of the instruction was either three 3-bit register fields (two operands and one result), or two registers with an 18-bit immediate constant. All instructions were 'register to register'. For example the following COMPASS
code loads two values from memory, performs a 60-bit integer add, then stores the result:
The central processor used in the CDC 6400 series contained a unified arithmetic element which performed one machine instruction at a time. Depending on instruction type, an instruction could take anywhere from a relatively fast 5 clock cycles (18-bit integer arithmetic) to as many as 68 clock cycles (60-bit population count). The CDC 6500 was identical to the 6400, but included two identical 6400 CPUs. Thus the CDC 6500 could nearly double the computational throughput of the machine.
The CDC 6600 computer, like the CDC 6400, has just one central processor. However, its central processor offered much greater efficiency. The processor was divided into 10 individual functional units, each of which was designed for a specific type of operation. The function units provided were: branch, Boolean, shift, long integer add, floating add, floating divide, two floating multipliers, and two increment (18-bit integer add) units. Functional unit latencies were between a very fast 3 clock cycles (increment add) and 29 clock cycles (floating divide).
The 6600 processor could issue a new instruction every clock cycle, assuming that various processor (functional unit, register) resources were available. These resources were kept track of by a scoreboard mechanism. Also contributing to keeping the issue rate high was an instruction stack, which cache
d the contents of several instruction words. Small loops could reside entirely within the stack, eliminating memory latency from instruction fetches.
Both the 6400 and 6600 CPUs had a cycle time of 100 ns (10 MHz). Due to the serial nature of the 6400 CPU, its exact speed was heavily dependent on instruction mix, but generally around 1 MIPS
. Floating adds were fairly fast at 11 clocks, however floating multiply was very slow at 57 clocks. Thus its floating point speed would depend heavily on the mix of operations and could be under 200 kFLOPS
. The 6600 was, of course, much faster. With good compiler instruction scheduling, the machine could approach its theoretical peak of 10 MIPS. Floating point adds took 4 clocks, and floating point multiplies took 10 clocks (but there were two multiply functional units, so two operations could be processing at the same time.) The 6600 could therefore have a peak floating point speed of 2-3 MFLOPS.
The CDC 6700 computer combined the best features of the other three computers. Like the CDC 6500, it had two central processors. One was a CDC 6400/CDC 6500 central processor with the unified arithmetic section; the other was the more efficient CDC 6600 central processor. The combination made the CDC 6700 the fastest and the most powerful of the four CDC 6000 series.
Information is stored in central memory in the form of words. The length of each word is 60 binary digits (bit
s). The highly efficient address and data control mechanisms involved permit a word to be moved into or out of central memory up to one every 100 nanoseconds.
An extended core storage unit (ECS) provides additional memory storage and enhances the powerful computing capabilities of the CDC 6000 series computers.
minicomputers, sharing the 12 bit word length and portions of the instruction set.) Peripheral processors are used primarily for input/output: the transfer of information between central memory and peripheral devices such as disk
s and magnetic tape
units. They relieve the central processor of all input/output tasks, so that it can perform calculations while the peripheral processors are engaged in input/output functions. This feature promotes rapid overall processing of user programs. Each peripheral processor can add, subtract, and perform logical operations.
Special instructions performed data transfer between processor memory and peripheral devices at up to 1 μs per word.
The peripheral processors were collectively implemented as a Barrel processor
.
Each executes routines independently of the others. (For comparison, on the IBM 360 series of machines, these processors were called channels
.) They are a loose predecessor of bus mastering or Direct memory access
.
Nearly all of the operating system ran on the PP's; thus leaving the full power of the Central Processor available for user programs.
Each peripheral device can communicate with any peripheral device if another peripheral processor is not using the data channel connected to that device. In other words, only one peripheral processor at a time can use a particular data channel.
In addition to communication between peripheral devices and peripheral processors, communication takes place between the computer operator and the operating system. This was made possible by the computer console, which had two CRT
screens.
This display console was a significant departure from conventional computer consoles of the time, which contained hundreds of blinking lights and switches for every state bit in the machine. (See Front panel
for an example.) By comparison, the 6000 series console was an elegant design; simple, fast and reliable.
The console screens were calligraphic
, not raster
based. Analog circuitry actually steered the electron beams to draw the individual characters on the screen. One of the peripheral processors ran a dedicated program called "DSD" (Dynamic System Display), which drove the console. Coding in DSD needed to be fast as it needed to continually redraw the screen quickly enough to avoid visible flicker.
DSD displayed information about the system and the jobs in process. The console also included a keyboard through which the operator could enter requests to modify stored programs and display information about jobs in or awaiting execution.
A full screen editor, called O26
(after the IBM
model 026 key punch
, with the first character made alphabetic due to operating system restrictions), could be run on the operator console. This text editor
appeared in 1967—which made is one of the first full screen editors. (Unfortunately, it took CDC another 15 years to offer FSE, a full screen editor for normal time-sharing
users on CDCs Network Operating System.)
There were also a variety of games that were written using the operator console. These included BAT (a baseball game), KAL (a kaleidoscope
), DOG (Snoopy
flying his doghouse across the screens), ADC (Andy Capp
strutting across the screens), EYE (changed the screens into giant eyeballs, then winked them), PAC (a Pac-man
-like game), and more.
, punched card punch, printer
with controllers, and two 7-track magnetic tape units. Larger systems can be obtained by including optional equipment such as: additional central memory, extended core storage (ECS), additional card readers, punches, printers, and tape units. Graphic plotter
s and microfilm recorders are also available.
Mainframe computer
Mainframes are powerful computers used primarily by corporate and governmental organizations for critical applications, bulk data processing such as census, industry and consumer statistics, enterprise resource planning, and financial transaction processing.The term originally referred to the...
s manufactured by Control Data Corporation
Control Data Corporation
Control Data Corporation was a supercomputer firm. For most of the 1960s, it built the fastest computers in the world by far, only losing that crown in the 1970s after Seymour Cray left the company to found Cray Research, Inc....
in the 1960s. It consisted of CDC 6400
CDC 6400
The CDC 6400, a member of the CDC 6000 series, was a mainframe computer made by Control Data Corporation in the 1960s. The central processing unit was architecturally compatible with the CDC 6600...
, CDC 6500, CDC 6600
CDC 6600
The CDC 6600 was a mainframe computer from Control Data Corporation, first delivered in 1964. It is generally considered to be the first successful supercomputer, outperforming its fastest predecessor, IBM 7030 Stretch, by about three times...
and CDC 6700 computers, which all were extremely rapid and efficient for their time. Each was a large, solid-state, general-purpose, digital computer that performed scientific and business data processing as well as multiprogramming
Multiprogramming
Computer multiprogramming is the allocation of a computer system and its resources to more than one concurrent application, job or user ....
, multiprocessing
Multiprocessing
Multiprocessing is the use of two or more central processing units within a single computer system. The term also refers to the ability of a system to support more than one processor and/or the ability to allocate tasks between them...
, time-sharing
Time-sharing
Time-sharing is the sharing of a computing resource among many users by means of multiprogramming and multi-tasking. Its introduction in the 1960s, and emergence as the prominent model of computing in the 1970s, represents a major technological shift in the history of computing.By allowing a large...
, and data management
Data management
Data management comprises all the disciplines related to managing data as a valuable resource.- Overview :The official definition provided by DAMA International, the professional organization for those in the data management profession, is: "Data Resource Management is the development and execution...
tasks under the control of the operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
called SCOPE (Supervisory Control Of Program Execution).
History
The first member of the CDC 6000 series was the first supercomputerSupercomputer
A supercomputer is a computer at the frontline of current processing capacity, particularly speed of calculation.Supercomputers are used for highly calculation-intensive tasks such as problems including quantum physics, weather forecasting, climate research, molecular modeling A supercomputer is a...
CDC 6600
CDC 6600
The CDC 6600 was a mainframe computer from Control Data Corporation, first delivered in 1964. It is generally considered to be the first successful supercomputer, outperforming its fastest predecessor, IBM 7030 Stretch, by about three times...
, designed by Seymour Cray
Seymour Cray
Seymour Roger Cray was an American electrical engineer and supercomputer architect who designed a series of computers that were the fastest in the world for decades, and founded Cray Research which would build many of these machines. Called "the father of supercomputing," Cray has been credited...
and James E. Thornton in Chippewa Falls, Wisconsin
Chippewa Falls, Wisconsin
Chippewa Falls is a city located on the Chippewa River in Chippewa County in the U.S. state of Wisconsin. The population was 13,661 at the 2010 census. Incorporated as a city in 1869, it is the county seat of Chippewa County....
. It was introduced in September, 1964 and performed up to three million instructions per second, three times faster than the IBM Stretch, the speed champ for the previous couple of years. It remained the fastest machine for five years until the CDC 7600
CDC 7600
The CDC 7600 was the Seymour Cray-designed successor to the CDC 6600, extending Control Data's dominance of the supercomputer field into the 1970s. The 7600 ran at 36.4 MHz and had a 65 Kword primary memory using core and variable-size secondary memory...
was launched. The machine was Freon refrigerant cooled. Control Data manufactured about 100 machines of this type, selling for $6 to $10 million each.
The next system to be introduced was the CDC 6400
CDC 6400
The CDC 6400, a member of the CDC 6000 series, was a mainframe computer made by Control Data Corporation in the 1960s. The central processing unit was architecturally compatible with the CDC 6600...
, delivered in April, 1966. The 6400 central processor was a slower, less expensive, implementation with serial processing, rather than the 6600s parallel functional units. All other aspects of the 6400 were identical to the 6600. Then followed a machine with dual 6400-style central processors, the CDC 6500, designed principally by James E. Thornton, in October, 1967. And finally, the CDC 6700, with both a 6600-style CPU and a 6400-style CPU, was released in October, 1969.
Subsequent modifications to the series in 1969 included the extension to 20 peripheral and control processors with 24 channels. (During 1971-73, Control Data's Software Research Lab operated internally a 6600 machine with 30 PP's, but this was never sold commercially.) Control Data also marketed a CDC 6400 with a smaller number of peripheral processors, the CDC 6415-7 with 7 peripheral processors to reduce cost.
Central processor
The central processor was the high-speed arithmetic unit that functioned as the workhorse of the computer. It performed the addition, subtraction, and logical operations and all of the multiplication, division, incrementing, indexing, and branching instructions for user programs. Note that in the CDC 6000 architecture, the central processing unit performed no I/O operations. I/O was totally asynchronous, and performed by peripheral processors.A 6000 series CPU contained 24 operating registers, designated X0-X7, A0-A7, and B0-B7. The eight X registers were each 60 bits
60-bit
Computers with 60-bit words include the CDC 6000 series and some of the CDC Cyber series....
long, and used for most data manipulation—both integer and floating point. The eight B registers were 18 bits
18-bit
18 binary digits have unique combinations.-Example 18-bit computer architectures:* Possibly the most well-known 18-bit computer architectures are the PDP-1, PDP-4, PDP-7, PDP-9 and PDP-15 minicomputers produced by Digital Equipment Corporation from 1960 to 1975.* UNIVAC produced a number of...
long, and generally used for indexing and address storage. Register B0 was hard-wired to always return 0. By software convention, register B1 was generally set to 1. (This often allowed the use of 15-bit instructions instead of 30-bit instructions.) The eight 18-bit A registers were 'coupled' to their corresponding X registers in an interesting way: setting an address into any of registers A1 through A5 caused a memory load of the contents of that address into the corresponding X registers. Likewise, setting an address into registers A6 and A7 caused a memory store into that location in memory. Registers A0 and X0 were not coupled in this way, so could be used as scratch registers. However A0 and X0 were used when addressing CDCs Extended Core Storage (ECS).
Instructions were either 15 or 30 bits long, so there could be up to 4 instructions per 60-bit
60-bit
Computers with 60-bit words include the CDC 6000 series and some of the CDC Cyber series....
word. The op codes were 6 bits long. The remainder of the instruction was either three 3-bit register fields (two operands and one result), or two registers with an 18-bit immediate constant. All instructions were 'register to register'. For example the following COMPASS
COMPASS
COMPASS is an acronym for COMPrehensive ASSembler. COMPASS is any of a family of macro assembly languages on Control Data Corporation's 3000 series, and on the 60-bit CDC 6000 series, 7600 and Cyber 70 and 170 series mainframe computers...
code loads two values from memory, performs a 60-bit integer add, then stores the result:
SA1 X "SET" REGISTER A1 TO THE ADDRESS OF X (30 BIT INSTRUCTION)
SA2 Y "SET" REGISTER A2 TO THE ADDRESS OF Y (30 BIT INSTRUCTION)
IX6 X1+X2 LONG INTEGER ADD X AND Y (15 BIT INSTRUCTION)
SA6 Z "SET" REGISTER A6 TO THE ADDRESS OF Z (30 BIT INSTRUCTION)
The central processor used in the CDC 6400 series contained a unified arithmetic element which performed one machine instruction at a time. Depending on instruction type, an instruction could take anywhere from a relatively fast 5 clock cycles (18-bit integer arithmetic) to as many as 68 clock cycles (60-bit population count). The CDC 6500 was identical to the 6400, but included two identical 6400 CPUs. Thus the CDC 6500 could nearly double the computational throughput of the machine.
The CDC 6600 computer, like the CDC 6400, has just one central processor. However, its central processor offered much greater efficiency. The processor was divided into 10 individual functional units, each of which was designed for a specific type of operation. The function units provided were: branch, Boolean, shift, long integer add, floating add, floating divide, two floating multipliers, and two increment (18-bit integer add) units. Functional unit latencies were between a very fast 3 clock cycles (increment add) and 29 clock cycles (floating divide).
The 6600 processor could issue a new instruction every clock cycle, assuming that various processor (functional unit, register) resources were available. These resources were kept track of by a scoreboard mechanism. Also contributing to keeping the issue rate high was an instruction stack, which cache
Cache
In computer engineering, a cache is a component that transparently stores data so that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere...
d the contents of several instruction words. Small loops could reside entirely within the stack, eliminating memory latency from instruction fetches.
Both the 6400 and 6600 CPUs had a cycle time of 100 ns (10 MHz). Due to the serial nature of the 6400 CPU, its exact speed was heavily dependent on instruction mix, but generally around 1 MIPS
Instructions per second
Instructions per second is a measure of a computer's processor speed. Many reported IPS values have represented "peak" execution rates on artificial instruction sequences with few branches, whereas realistic workloads typically lead to significantly lower IPS values...
. Floating adds were fairly fast at 11 clocks, however floating multiply was very slow at 57 clocks. Thus its floating point speed would depend heavily on the mix of operations and could be under 200 kFLOPS
FLOPS
In computing, FLOPS is a measure of a computer's performance, especially in fields of scientific calculations that make heavy use of floating-point calculations, similar to the older, simpler, instructions per second...
. The 6600 was, of course, much faster. With good compiler instruction scheduling, the machine could approach its theoretical peak of 10 MIPS. Floating point adds took 4 clocks, and floating point multiplies took 10 clocks (but there were two multiply functional units, so two operations could be processing at the same time.) The 6600 could therefore have a peak floating point speed of 2-3 MFLOPS.
The CDC 6700 computer combined the best features of the other three computers. Like the CDC 6500, it had two central processors. One was a CDC 6400/CDC 6500 central processor with the unified arithmetic section; the other was the more efficient CDC 6600 central processor. The combination made the CDC 6700 the fastest and the most powerful of the four CDC 6000 series.
Central memory
In all the CDC 6000 series computers, the central processor communicates with around seven simultaneously active programs (jobs), which reside in central memory. Instructions from these programs are read into the central processor registers and are executed by the central processor at scheduled intervals. The results are then returned to central memory.Information is stored in central memory in the form of words. The length of each word is 60 binary digits (bit
Bit
A bit is the basic unit of information in computing and telecommunications; it is the amount of information stored by a digital device or other physical system that exists in one of two possible distinct states...
s). The highly efficient address and data control mechanisms involved permit a word to be moved into or out of central memory up to one every 100 nanoseconds.
An extended core storage unit (ECS) provides additional memory storage and enhances the powerful computing capabilities of the CDC 6000 series computers.
Peripheral processors
The central processor shares access to central memory with ten peripheral processors. Each peripheral processor is an individual computer with its own 1 μs memory of 4K words, each with 12 bits. (They were somewhat similar to CDC 160ACDC 160A
The CDC 160 and CDC 160-A were 12-bit minicomputers built by Control Data Corporation from 1960 to 1965. The 160 was designed by Seymour Cray - reportedly over a long three-day weekend...
minicomputers, sharing the 12 bit word length and portions of the instruction set.) Peripheral processors are used primarily for input/output: the transfer of information between central memory and peripheral devices such as disk
Disk storage
Disk storage or disc storage is a general category of storage mechanisms, in which data are digitally recorded by various electronic, magnetic, optical, or mechanical methods on a surface layer deposited of one or more planar, round and rotating disks...
s and magnetic tape
Magnetic tape
Magnetic tape is a medium for magnetic recording, made of a thin magnetizable coating on a long, narrow strip of plastic. It was developed in Germany, based on magnetic wire recording. Devices that record and play back audio and video using magnetic tape are tape recorders and video tape recorders...
units. They relieve the central processor of all input/output tasks, so that it can perform calculations while the peripheral processors are engaged in input/output functions. This feature promotes rapid overall processing of user programs. Each peripheral processor can add, subtract, and perform logical operations.
Special instructions performed data transfer between processor memory and peripheral devices at up to 1 μs per word.
The peripheral processors were collectively implemented as a Barrel processor
Barrel processor
A barrel processor is a CPU that switches between threads of execution on every cycle. This CPU design technique is also known as "interleaved" or "fine-grained" temporal multithreading...
.
Each executes routines independently of the others. (For comparison, on the IBM 360 series of machines, these processors were called channels
Channel I/O
In computer science, channel I/O is a generic term that refers to a high-performance input/output architecture that is implemented in various forms on a number of computer architectures, especially on mainframe computers...
.) They are a loose predecessor of bus mastering or Direct memory access
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
.
Nearly all of the operating system ran on the PP's; thus leaving the full power of the Central Processor available for user programs.
Data channels
For input or output, each peripheral processor accesses a peripheral device over a communication link called a data channel. One peripheral device can be connected to each data channel; however, a channel can be modified with hardware to service more than one device.Each peripheral device can communicate with any peripheral device if another peripheral processor is not using the data channel connected to that device. In other words, only one peripheral processor at a time can use a particular data channel.
Display console
Cathode ray tube
The cathode ray tube is a vacuum tube containing an electron gun and a fluorescent screen used to view images. It has a means to accelerate and deflect the electron beam onto the fluorescent screen to create the images. The image may represent electrical waveforms , pictures , radar targets and...
screens.
This display console was a significant departure from conventional computer consoles of the time, which contained hundreds of blinking lights and switches for every state bit in the machine. (See Front panel
Front panel
A front panel was used on early electronic computers to display and allow the alteration of the state of the machine's internal registers and memory. The front panel usually consisted of arrays of indicator lamps, toggle switches, and push buttons mounted on a sheet metal face plate...
for an example.) By comparison, the 6000 series console was an elegant design; simple, fast and reliable.
The console screens were calligraphic
Vector graphics
Vector graphics is the use of geometrical primitives such as points, lines, curves, and shapes or polygon, which are all based on mathematical expressions, to represent images in computer graphics...
, not raster
Raster graphics
In computer graphics, a raster graphics image, or bitmap, is a data structure representing a generally rectangular grid of pixels, or points of color, viewable via a monitor, paper, or other display medium...
based. Analog circuitry actually steered the electron beams to draw the individual characters on the screen. One of the peripheral processors ran a dedicated program called "DSD" (Dynamic System Display), which drove the console. Coding in DSD needed to be fast as it needed to continually redraw the screen quickly enough to avoid visible flicker.
DSD displayed information about the system and the jobs in process. The console also included a keyboard through which the operator could enter requests to modify stored programs and display information about jobs in or awaiting execution.
A full screen editor, called O26
O26 (text editor)
O26, a full screen editor, was named after the IBM model 026 keypunch....
(after the IBM
IBM
International Business Machines Corporation or IBM is an American multinational technology and consulting corporation headquartered in Armonk, New York, United States. IBM manufactures and sells computer hardware and software, and it offers infrastructure, hosting and consulting services in areas...
model 026 key punch
Key punch
A keypunch is a device for manually entering data into punched cards by precisely punching holes at locations designated by the keys struck by the operator. Early keypunches were manual devices. Later keypunches were mechanized, often resembled a small desk, with a keyboard similar to a...
, with the first character made alphabetic due to operating system restrictions), could be run on the operator console. This text editor
Text editor
A text editor is a type of program used for editing plain text files.Text editors are often provided with operating systems or software development packages, and can be used to change configuration files and programming language source code....
appeared in 1967—which made is one of the first full screen editors. (Unfortunately, it took CDC another 15 years to offer FSE, a full screen editor for normal time-sharing
Time-sharing
Time-sharing is the sharing of a computing resource among many users by means of multiprogramming and multi-tasking. Its introduction in the 1960s, and emergence as the prominent model of computing in the 1970s, represents a major technological shift in the history of computing.By allowing a large...
users on CDCs Network Operating System.)
There were also a variety of games that were written using the operator console. These included BAT (a baseball game), KAL (a kaleidoscope
Kaleidoscope
A kaleidoscope is a circle of mirrors containing loose, colored objects such as beads or pebbles and bits of glass. As the viewer looks into one end, light entering the other end creates a colorful pattern, due to the reflection off the mirrors...
), DOG (Snoopy
Snoopy
Snoopy is an fictional character in the long-running comic strip Peanuts, by Charles M. Schulz. He is Charlie Brown's pet beagle. Snoopy began his life in the strip as a fairly conventional dog, but eventually evolved into perhaps the strip's most dynamic character—and among the most recognizable...
flying his doghouse across the screens), ADC (Andy Capp
Andy Capp
Andy Capp is a British comic strip created by cartoonist Reg Smythe , seen in The Daily Mirror and The Sunday Mirror newspapers since 5 August 1957. Originally a single-panel cartoon, Smyth later expanded it to four panels....
strutting across the screens), EYE (changed the screens into giant eyeballs, then winked them), PAC (a Pac-man
Pac-Man
is an arcade game developed by Namco and licensed for distribution in the United States by Midway, first released in Japan on May 22, 1980. Immensely popular from its original release to the present day, Pac-Man is considered one of the classics of the medium, virtually synonymous with video games,...
-like game), and more.
Minimum configuration
The minimum hardware requirements of a CDC 6000 series computer system consists of the computer, including 32,768 words of central memory storage, any combination of disks, disk packs or drums to provide 24 million characters of mass storage, a punched card readerCard reader
A card reader is a data input device that reads data from a card-shaped storage medium. Historically, paper or cardboard punched cards were used throughout the first several decades of the computer industry to store information and programs for computer system, and were read by punched card readers...
, punched card punch, printer
Computer printer
In computing, a printer is a peripheral which produces a text or graphics of documents stored in electronic form, usually on physical print media such as paper or transparencies. Many printers are primarily used as local peripherals, and are attached by a printer cable or, in most new printers, a...
with controllers, and two 7-track magnetic tape units. Larger systems can be obtained by including optional equipment such as: additional central memory, extended core storage (ECS), additional card readers, punches, printers, and tape units. Graphic plotter
Plotter
A plotter is a computer printing device for printing vector graphics. In the past, plotters were widely used in applications such as computer-aided design, though they have generally been replaced with wide-format conventional printers...
s and microfilm recorders are also available.
External links
- Neil R. Lincoln with 18 Control Data Corporation (CDC) engineers on computer architecture and design, Charles Babbage InstituteCharles Babbage InstituteThe Charles Babbage Institute is a research center at the University of Minnesota specializing in the history of information technology, particularly the history since 1935 of digital computing, programming/software, and computer networking....
, University of Minnesota. Engineers include Robert Moe, Wayne Specker, Dennis Grinna, Tom Rowan, Maurice Hutson, Curt Alexander, Don Pagelkopf, Maris Bergmanis, Dolan Toth, Chuck Hawley, Larry Krueger, Mike Pavlov, Dave Resnick, Howard Krohn, Bill Bhend, Kent Steiner, Raymon Kort, and Neil R. Lincoln. Discussion topics include CDC 1604CDC 1604The CDC 1604 was a 48-bit computer designed and manufactured by Seymour Cray and his team at the Control Data Corporation. The 1604 is known as the first commercially successful transistorized computer. Legend has it that the 1604 designation was chosen by adding CDC's first street address to...
, CDC 6600CDC 6600The CDC 6600 was a mainframe computer from Control Data Corporation, first delivered in 1964. It is generally considered to be the first successful supercomputer, outperforming its fastest predecessor, IBM 7030 Stretch, by about three times...
, CDC 7600CDC 7600The CDC 7600 was the Seymour Cray-designed successor to the CDC 6600, extending Control Data's dominance of the supercomputer field into the 1970s. The 7600 ran at 36.4 MHz and had a 65 Kword primary memory using core and variable-size secondary memory...
, and Seymour CraySeymour CraySeymour Roger Cray was an American electrical engineer and supercomputer architect who designed a series of computers that were the fastest in the world for decades, and founded Cray Research which would build many of these machines. Called "the father of supercomputing," Cray has been credited...
.