PLL multibit
Encyclopedia
A PLL multibit or Multibit PLL is a phase-locked loop
(PLL) which uses more of the information available in the PLL, to achieve improved performance. Unibit PLLs use only one bit of each counter's output bus, the most significant bit
(MSB) to measure the phase, whereas Multibit PLLs use more bits [1]. PLLs are an essential component in telecommunications.
The Multibit PLL achieves improved efficiency and performance: better utilization of the frequency spectrum
, to serve more users at a higher Quality of service
(QoS), reduced RF transmit power, and reduced power consumption in cellular phones and other wireless
devices.
: an electronic component or system comprising a closed loop for controlling the phase of an oscillator while comparing it with the phase of an input or reference signal. An indirect frequency synthesizer
uses a PLL. In an all-digital PLL, the voltage-controlled oscillator VCO is controlled using a digital, rather than an analog, control signal. The phase detector gives a signal proportional to the phase difference between two signals; in a PLL, one signal is the reference, and the other is the output of the controlled oscillator (or a divider driven by the oscillator).
In a unibit phase-locked loop, the phase is measured using only one bit of the reference and output counters, the most significant bit (MSB). In a multibit phase-locked loop, the phase is measured using more than one bit of the reference and output counters, usually including the Most significant bit
MSB and additional bits.
The closed loop
operates to correct such frequency deviations; higher performance PLL reduces these fluctuations to lower values, however these deviations can never be stopped.
See Control theory
Frequency settling time
is the time it takes the PLL to hop to another frequency. Frequency hopping is used in GSM, and still more in modern systems.
In CDMA, frequency hopping achieves better performance than phase coding.
Fine frequency resolution is the capability of a PLL to generate closely spaced frequencies. For example, a cellular network
may require a mobile phone to set its frequency at any of a plurality of values, spaced 30 kHz or 10 kHz.
The performance envelope of a PLL defines the interrelation between the above essential criteria of performance - for example improving the frequency resolution will result in a slower PLL and higher phase noise
, etc.
The PLL Multibit expands the performance envelope of the PLL - it enables to achieve faster settling time
together with fine frequency resolution and with lower phase noise
.
Only the MSB of the two counters are at the same frequency. The other bits in one counter have different frequencies from those in the other counter.
All the bits at the output of one counter, together, represent a digital bus. Thus, in a PLL frequency synthesizer
there are two buses, one for the reference counter, the other for the output (or VCO) counter. In a uni-bit PLL, of the two digital buses, only one bit (line) of each is used. All the rest of the information is lost.
Improved performance is possible by using the faster bits of the counters, taking into account the additional available information.
The operation of the PLL is further disrupted by overflow in the counters. This effect is only relevant in multibit PLLs; for Unibit PLL, there is only the one-bit signal MSB, therefore no overflow is possible.
Early multibit PLLs used a microprocessor
, a microcontroller
or DSP to close the loop in a smart implementation [8] to [14].
Recent advances in PLL technology can be gleaned from the patents and patent applications published, for example [15] to [40].
Advances in one embodiment of the Multibit PLL technology can be reviewed from references [12], [15], [16].
It thus enhances the overall performance envelope of the PLL.
The loop bandwidth can be optimized for phase noise performance and/or frequency settling speed; it depends less on the frequency resolution.
Improving the PLL performance can make better use of the frequency spectrum
and reduce transmit power. And indeed, PLL performance is being constantly improved, see for example [1], [8] to [40].
Phase-locked loop
A phase-locked loop or phase lock loop is a control system that generates an output signal whose phase is related to the phase of an input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector...
(PLL) which uses more of the information available in the PLL, to achieve improved performance. Unibit PLLs use only one bit of each counter's output bus, the most significant bit
Most significant bit
In computing, the most significant bit is the bit position in a binary number having the greatest value...
(MSB) to measure the phase, whereas Multibit PLLs use more bits [1]. PLLs are an essential component in telecommunications.
The Multibit PLL achieves improved efficiency and performance: better utilization of the frequency spectrum
Frequency spectrum
The frequency spectrum of a time-domain signal is a representation of that signal in the frequency domain. The frequency spectrum can be generated via a Fourier transform of the signal, and the resulting values are usually presented as amplitude and phase, both plotted versus frequency.Any signal...
, to serve more users at a higher Quality of service
Quality of service
The quality of service refers to several related aspects of telephony and computer networks that allow the transport of traffic with special requirements...
(QoS), reduced RF transmit power, and reduced power consumption in cellular phones and other wireless
Wireless
Wireless telecommunications is the transfer of information between two or more points that are not physically connected. Distances can be short, such as a few meters for television remote control, or as far as thousands or even millions of kilometers for deep-space radio communications...
devices.
Concepts
A Phase-locked loopPhase-locked loop
A phase-locked loop or phase lock loop is a control system that generates an output signal whose phase is related to the phase of an input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector...
: an electronic component or system comprising a closed loop for controlling the phase of an oscillator while comparing it with the phase of an input or reference signal. An indirect frequency synthesizer
Frequency synthesizer
A frequency synthesizer is an electronic system for generating any of a range of frequencies from a single fixed timebase or oscillator. They are found in many modern devices, including radio receivers, mobile telephones, radiotelephones, walkie-talkies, CB radios, satellite receivers, GPS systems,...
uses a PLL. In an all-digital PLL, the voltage-controlled oscillator VCO is controlled using a digital, rather than an analog, control signal. The phase detector gives a signal proportional to the phase difference between two signals; in a PLL, one signal is the reference, and the other is the output of the controlled oscillator (or a divider driven by the oscillator).
In a unibit phase-locked loop, the phase is measured using only one bit of the reference and output counters, the most significant bit (MSB). In a multibit phase-locked loop, the phase is measured using more than one bit of the reference and output counters, usually including the Most significant bit
Most significant bit
In computing, the most significant bit is the bit position in a binary number having the greatest value...
MSB and additional bits.
The Unibit PLL
The above figure shows the ubiquitous PLL. In unibit PLLs, the output frequency is defined by the input frequency and the modulo count of the two counters. In each counter, only the most significant bit (MSB) is used. The other output lines of the counters are ignored; this is wasted information.PLL structure and performance
- A PLL includes a phase detectorPhase detectorA phase detector or phase comparator is a frequency mixer, analog multiplier or logic circuit that generates a voltage signal which represents the difference in phase between two signal inputs...
, filter and oscillator connected in a closed loop, so the oscillator frequency follows (equals) the input frequency. - Although the average output frequency equals the input frequency, the oscillator's frequency fluctuates or vibrates about that average value.
The closed loop
Closed loop
Closed loop may refer to:* A feedback loop, often found in:** Control theory#Closed-loop transfer function, where a closed-loop controller may be used** Electronic feedback loops in electronic circuits** PID controller, a commonly used closed-loop controller...
operates to correct such frequency deviations; higher performance PLL reduces these fluctuations to lower values, however these deviations can never be stopped.
See Control theory
Control theory
Control theory is an interdisciplinary branch of engineering and mathematics that deals with the behavior of dynamical systems. The desired output of a system is called the reference...
- Phase noisePhase noisePhase noise is the frequency domain representation of rapid, short-term, random fluctuations in the phase of a waveform, caused by time domain instabilities...
, Spurious emissionSpurious emissionA spurious emission is any radio frequency not deliberately created or transmitted, especially in a device which normally does create other frequencies...
, jitterJitterJitter is the undesired deviation from true periodicity of an assumed periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may be observed in characteristics such as the frequency of successive pulses, the signal amplitude, or phase of...
are results of the above phenomena.
PLL Synthesizer characteristics
- PLL frequency synthesizerFrequency synthesizerA frequency synthesizer is an electronic system for generating any of a range of frequencies from a single fixed timebase or oscillator. They are found in many modern devices, including radio receivers, mobile telephones, radiotelephones, walkie-talkies, CB radios, satellite receivers, GPS systems,...
s are widely used in modern telecommunications. For example, a cellular phone may include 3 to 6 PLLs. - The phase noisePhase noisePhase noise is the frequency domain representation of rapid, short-term, random fluctuations in the phase of a waveform, caused by time domain instabilities...
may interfere with other subscribers, to reduce their quality of serviceQuality of serviceThe quality of service refers to several related aspects of telephony and computer networks that allow the transport of traffic with special requirements...
. The interference is mutual. If the noise is reduced, faster communications are possible, to increase the symbol rateSymbol rateIn digital communications, symbol rate is the number of symbol changes made to the transmission medium per second using a digitally modulated signal or a line code. The Symbol rate is measured in baud or symbols/second. In the case of a line code, the symbol rate is the pulse rate in pulses/second...
using more complex modulation schemes - that is, transmitting more bits per sample.
Frequency settling time
Settling time
The settling time of an amplifier or other output device is the time elapsed from the application of an ideal instantaneous step input to the time at which the amplifier output has entered and remained within a specified error band, usually symmetrical about the final value.Settling time includes a...
is the time it takes the PLL to hop to another frequency. Frequency hopping is used in GSM, and still more in modern systems.
In CDMA, frequency hopping achieves better performance than phase coding.
Fine frequency resolution is the capability of a PLL to generate closely spaced frequencies. For example, a cellular network
Cellular network
A cellular network is a radio network distributed over land areas called cells, each served by at least one fixed-location transceiver known as a cell site or base station. When joined together these cells provide radio coverage over a wide geographic area...
may require a mobile phone to set its frequency at any of a plurality of values, spaced 30 kHz or 10 kHz.
The performance envelope of a PLL defines the interrelation between the above essential criteria of performance - for example improving the frequency resolution will result in a slower PLL and higher phase noise
Phase noise
Phase noise is the frequency domain representation of rapid, short-term, random fluctuations in the phase of a waveform, caused by time domain instabilities...
, etc.
The PLL Multibit expands the performance envelope of the PLL - it enables to achieve faster settling time
Settling time
The settling time of an amplifier or other output device is the time elapsed from the application of an ideal instantaneous step input to the time at which the amplifier output has entered and remained within a specified error band, usually symmetrical about the final value.Settling time includes a...
together with fine frequency resolution and with lower phase noise
Phase noise
Phase noise is the frequency domain representation of rapid, short-term, random fluctuations in the phase of a waveform, caused by time domain instabilities...
.
Effects of Unibit
As one progresses from the MSB toward the least significant bit (LSB), the frequency increases. For a binary counter, each next bit is at twice the frequency of the previous one. For modulo counters, the relationship is more complicated.Only the MSB of the two counters are at the same frequency. The other bits in one counter have different frequencies from those in the other counter.
All the bits at the output of one counter, together, represent a digital bus. Thus, in a PLL frequency synthesizer
Frequency synthesizer
A frequency synthesizer is an electronic system for generating any of a range of frequencies from a single fixed timebase or oscillator. They are found in many modern devices, including radio receivers, mobile telephones, radiotelephones, walkie-talkies, CB radios, satellite receivers, GPS systems,...
there are two buses, one for the reference counter, the other for the output (or VCO) counter. In a uni-bit PLL, of the two digital buses, only one bit (line) of each is used. All the rest of the information is lost.
Complexity of PLL design
PLL design is an interdisciplinary task, difficult even for experts in PLLs. This - for the Unibit PLL, which is simpler than the Multibit PLL. The design should take into account, see [2] to [7]:- Control theoryControl theoryControl theory is an interdisciplinary branch of engineering and mathematics that deals with the behavior of dynamical systems. The desired output of a system is called the reference...
, closed loop system. - Radio frequency RF design - the oscillator, high frequency components
- Analog circuits - loop filter
- Digital circuits - counters, phase measurement
- RFI/EMI, shielding, grounding
- Statistics of noise and phase noisePhase noisePhase noise is the frequency domain representation of rapid, short-term, random fluctuations in the phase of a waveform, caused by time domain instabilities...
in electronic components and circuits.
Principle of operation
The above PLL uses more of the bits in the two counters. There is a difficult problem, of comparing signals at different frequencies, in two digital buses which count to a different final value.Improved performance is possible by using the faster bits of the counters, taking into account the additional available information.
The operation of the PLL is further disrupted by overflow in the counters. This effect is only relevant in multibit PLLs; for Unibit PLL, there is only the one-bit signal MSB, therefore no overflow is possible.
Implementation
The additional degree of freedom in Multibit PLLs allows to adapt each PLL to specific requirements. This can be effectively implemented with programmable logic devices (PLD), for example those manufactured by Altera Corp. [7] Altera provides both digital components and advanced design tools for using and programming the components.Early multibit PLLs used a microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
, a microcontroller
Microcontroller
A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM...
or DSP to close the loop in a smart implementation [8] to [14].
Recent advances in PLL technology can be gleaned from the patents and patent applications published, for example [15] to [40].
Advances in one embodiment of the Multibit PLL technology can be reviewed from references [12], [15], [16].
Benefits
A multibit PLL offers fine frequency resolution and fast frequency hopping, together with lower phase noise and lower power consumption.It thus enhances the overall performance envelope of the PLL.
The loop bandwidth can be optimized for phase noise performance and/or frequency settling speed; it depends less on the frequency resolution.
Improving the PLL performance can make better use of the frequency spectrum
Frequency spectrum
The frequency spectrum of a time-domain signal is a representation of that signal in the frequency domain. The frequency spectrum can be generated via a Fourier transform of the signal, and the resulting values are usually presented as amplitude and phase, both plotted versus frequency.Any signal...
and reduce transmit power. And indeed, PLL performance is being constantly improved, see for example [1], [8] to [40].