List of future Intel microprocessors
Encyclopedia

"Sandy Bridge-E"

  • Based on Sandy Bridge
    Sandy Bridge
    Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...

     microarchitecture.
  • Intel has announced that the K processors will not be shipped with a stock cooler since they have recognized that these processors are subjects for overclockers and extreme users. These users often install third-party high-end coolers instead. Intel will present an alternative to the standard cooler, their own competitor to such liquid-coolers as the Corsair Hydro- and Antec Kühler-series. The price of this cooler is not yet announced.
  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , SSE4.1, SSE4.2, AVX
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

    , Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), Intel 64, XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    , Turbo Boost, AES-NI
    AES instruction set
    Advanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...

    , Smart Cache, Intel Insider (Digital rights management
    Digital rights management
    Digital rights management is a class of access control technologies that are used by hardware manufacturers, publishers, copyright holders and individuals with the intent to limit the use of digital content and devices after sale. DRM is any technology that inhibits uses of digital content that...

    ).
  • Transistors: 2.27 billion


Name Cores Threads Frequency Turbo Boost  Multiplier* L2 cache L3 cache TDP Release Date Price (US)
Core i7 Extreme 3980X 6 12 3.40-3.50Ghz 4.00-4.10Ghz Unlocked TBA TBA TBA Q4 2011 TBA
Core i7 3820 4 8 3.60GHz 3.90GHz Partially Unlocked 4 x 256KB 10MB 130W Q1 2012 TBA

"Ivy Bridge" (22 nm)

  • Need to be re-edited
  • Basic features of Ivy Bridge-based Core i7 microprocessors will not change. The i7 CPUs will still have 4 CPU cores with Hyper-Threading support, 8 MB level 3 cache, and incorporate Turbo Boost technology. The fastest processor from the family, Core i7-3770K, is clocked at 3.5 GHz, which is on a par with the top Sandy Bridge i7-2700K chip.
  • Ivy Bridge Core i7 family will be utilize 77, 65 and 45 Watt power envelopes, which will correspond to suffix/"K", "S" and "T" processor numbers respectively.
  • Core i7 family, currently represented by i7-2600 and i7-2700 series of chips, will have i7-37xx processor numbers.
  • Core i5 family will also replace 2xxx numbers with 3xxx, that is i5-23xx, i5-24xx and i5-25xx will become i5-33xx, i5-34xx and i5-35xx.
  • Similarly, Core i3 family will use i3-31xx processor numbers.
  • Pentium and Celeron CPUs will be available with G2xxx numbers
  • Currently, second generation Core processors use such suffixes as "K" for unlocked processors, "S" to indicate performance-optimized mid-power chips, and "T" for low-power microprocessors. Ivy Bridge processor numbers will also use these suffixes, and will add a new one, "X" for extreme edition
  • Added features on Core i3 chips will be Hyper-Threading technology, AVX instructions, Quick Sync video, Clear Video HD, and InTru 3D. According to leaked slides, Core i3-31xx CPUs will have 55 Watt Thermal Design Power
  • Core i5 models will "lose" Hyper-Threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    , although they will add two extra cores.
  • The processors will feature 6 MB L3 cache, Turbo Boost, Vpro technology, AES instructions, and Digital Random Number Generator.
  • http://www.cpu-world.com/news_2011/2011112701_Ivy_Bridge_desktop_CPU_lineup_details.html

"Cedar Trail-M" (32 nm)

  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , Intel 64, Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), Hyper-Threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

  • Die Size: ? mm²
  • Package Size: 22 × 22 mm

"Sandy Bridge
Sandy Bridge
Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...

" (32 nm)

  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , SSE4.1, SSE4.2, AVX
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

    , Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), Intel 64, XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), Intel VT-x, Smart Cache
  • All models support Intel GMA HD Graphics 2000


"Sandy Bridge" (32 nm)

  • Based on Sandy Bridge microarchitecture
    Sandy Bridge
    Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...

    .
  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , SSE4.1, SSE4.2, AVX
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

    , Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), Intel 64, XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), Intel VT-x, Hyper-threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    , Smart Cache.
  • Transistors: 624 million
  • Die
    Die (integrated circuit)
    A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...

     size: 149.4 mm²

"Sandy Bridge
Sandy Bridge
Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...

" (32 nm)

  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , SSE4.1, SSE4.2, AVX
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

    , Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), Intel 64, XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    , Turbo Boost
    Intel Turbo Boost
    Intel Turbo Boost is a technology implemented by Intel in certain versions of their Nehalem- and Sandy Bridge-based CPUs, including Core i5 and Core i7 that enables the processor to run above its base operating frequency via dynamic control of the CPU's "clock rate". It is activated when the...

    , AES-NI
    AES instruction set
    Advanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...

    , Smart Cache.
  • Transistors: 624 million
  • Die
    Die (integrated circuit)
    A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...

     size: 149 mm²

"Sandy Bridge-E" (32 nm)

  • Based on Sandy Bridge
    Sandy Bridge
    Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...

     microarchitecture.
  • All models support: MMX, SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , SSSE3
    SSSE3
    Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...

    , SSE4.1, SSE4.2, AVX
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

    , Enhanced Intel SpeedStep
    SpeedStep
    SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...

     Technology (EIST), Intel 64, XD bit (an NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

     implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    , Turbo Boost, AES-NI
    AES instruction set
    Advanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...

    , Smart Cache.

See also


External links

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