In
real-time operating systemA real-time operating system is a multitasking operating system intended for real-time applications. Such applications include embedded systems , industrial robots, spacecraft, industrial control , and scientific research equipment.A RTOS facilitates the creation of a real-time system, but does not...
s,
interrupt latency is the time between the generation of an
interruptIn computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
by a device and the servicing of the device which generated the interrupt. For many operating systems, devices are serviced as soon as the device's
interrupt handlerAn interrupt handler, also known as an interrupt service routine , is a callback subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt...
is executed. Interrupt latency may be affected by interrupt controllers, interrupt masking, and the
operating systemAn operating system is an interface between hardware and user which is responsible for the management and coordination of activities and the sharing of the resources of the computer that acts as a host for computing applications run on the machine. As a host, one of the purposes of an operating...
's (OS) interrupt handling methods.
There is usually a tradeoff between interrupt latency,
throughputIn communication networks, such as Ethernet or packet radio, throughput or network throughput is the average rate of successful message delivery over a communication channel. These data may be delivered over a physical or logical link, or pass through a certain network node...
, and processor utilization.
In
real-time operating systemA real-time operating system is a multitasking operating system intended for real-time applications. Such applications include embedded systems , industrial robots, spacecraft, industrial control , and scientific research equipment.A RTOS facilitates the creation of a real-time system, but does not...
s,
interrupt latency is the time between the generation of an
interruptIn computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
by a device and the servicing of the device which generated the interrupt. For many operating systems, devices are serviced as soon as the device's
interrupt handlerAn interrupt handler, also known as an interrupt service routine , is a callback subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt...
is executed. Interrupt latency may be affected by interrupt controllers, interrupt masking, and the
operating systemAn operating system is an interface between hardware and user which is responsible for the management and coordination of activities and the sharing of the resources of the computer that acts as a host for computing applications run on the machine. As a host, one of the purposes of an operating...
's (OS) interrupt handling methods.
Background
There is usually a tradeoff between interrupt latency,
throughputIn communication networks, such as Ethernet or packet radio, throughput or network throughput is the average rate of successful message delivery over a communication channel. These data may be delivered over a physical or logical link, or pass through a certain network node...
, and processor utilization. Many of the techniques of
CPUA microprocessor incorporates most or all of the functions of a central processing unit on a single integrated circuit . The first microprocessors emerged in the early 1970s and were used for electronic calculators, using binary-coded decimal arithmetic on 4-bit words...
and
OSAn operating system is an interface between hardware and user which is responsible for the management and coordination of activities and the sharing of the resources of the computer that acts as a host for computing applications run on the machine. As a host, one of the purposes of an operating...
design that improve interrupt latency will decrease throughput and increase processor utilization. Techniques that increase throughput may increase interrupt latency and increase processor utilization. Lastly, trying to reduce processor utilization may increase interrupt latency and decrease throughput.
Minimum interrupt latency is largely determined by the interrupt controller circuit and its configuration. They can also affect the
jitterJitter is the time variation of a periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may be observed in characteristics such as the frequency of successive pulses, the signal amplitude, or phase of periodic signals...
in the interrupt latency, which can drastically affect the
real-timeIn computer science, real-time computing , or "reactive computing", is the study of hardware and software systems that are subject to a "real-time constraint"—i.e., operational deadlines from event to system response. By contrast, a non-real-time system is one for which there is no deadline, even...
schedulabilityScheduling is a key concept in computer multitasking and multiprocessing operating system design, and in real-time operating system design. In modern operating systems, there are typically many more processes running than there are CPUs available to run them.Scheduling refers to the way processes...
of the system. The
Intel APIC ArchitectureThe Intel APIC Architecture is a system of Advanced Programmable Interrupt Controllers designed by Intel for use in Symmetric Multi-Processor computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboards...
is well known for producing a huge amount of interrupt latency jitter.
Maximum interrupt latency is largely determined by the methods an OS uses for interrupt handling. For example, most processors allow programs to disable interrupts, putting off the execution of interrupt handlers, in order to protect
critical sectionIn concurrent programming a critical section is a piece of code that accesses a shared resource that must not be concurrently accessed by more than one thread of execution. A critical section will usually terminate in fixed time, and a thread, task or process will only have to wait a fixed time...
s of code. During the execution of such a critical section, all interrupt handlers that cannot execute safely within a critical section are blocked (they save the minimum amount of information required to restart the interrupt handler after all critical sections have exited). So the interrupt latency for a blocked interrupt is extended to the end of the critical section, plus any interrupts with equal and higher priority that arrived while the block was in place.
Many computer systems require low interrupt latencies, especially
embedded systemAn embedded system is a computer system designed to perform one or a few dedicated functions , often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. In contrast, a general-purpose computer, such as a personal...
s that need to
controlA control system is a device or set of devices to manage, command, direct or regulate the behavior of other devices or systems.There are two common classes of control systems, with many variations and combinations: logic or sequential controls, and feedback or linear controls...
machinery in real-time. Sometimes these systems use a
real-time operating systemA real-time operating system is a multitasking operating system intended for real-time applications. Such applications include embedded systems , industrial robots, spacecraft, industrial control , and scientific research equipment.A RTOS facilitates the creation of a real-time system, but does not...
(RTOS). An RTOS makes the promise that no more than an agreed upon maximum amount of time will pass between executions of
subroutineIn computer science, a subroutine or subprogram is a portion of code within a larger program, which performs a specific task and is relatively independent of the remaining code....
s. In order to do this, the RTOS must also guarantee that interrupt latency will never exceed a predefined maximum.
Considerations
There are many methods that hardware may use to increase the interrupt latency that can be tolerated. These include buffers, and
flow controlIn computer networking, flow control is the process of managing the rate of data transmission between two nodes to prevent a fast sender from outrunning a slow receiver. It provides a mechanism for the receiver to control the transmission speed, so that the receiving node is not overwhelmed with...
. For example, most network cards implement transmit and receive ring buffers, interrupt rate limiting, and hardware flow control. Buffers allow data to be stored until it can be transferred, and flow control allows the network card to pause communications without having to discard data if the buffer is full.
Modern hardware also implements interrupt rate limiting. This helps prevent
interrupt stormIn operating systems, an interrupt storm is an event during which a processor receives an inordinate number of interrupts that consume the majority of the processor's time...
s or
live lock by having the hardware wait a programmable minimum amount of time between each interrupt it generates. Interrupt rate limiting reduces the amount of time spent servicing interrupts, allowing the processor to spend more time doing useful work. Exceeding this time results in a soft (recoverable) or hard (non-recoverable) error.
See also
- Advanced Programmable Interrupt Controller
In computing, an Advanced Programmable Interrupt Controller is a more intricate Programmable Interrupt Controller containing a magnitude more outputs, much more complex priority schemata, and Advanced IRQ management....
- Programmable Interrupt Controller
A programmable interrupt controller is a device which allows priority levels to be assigned to its interrupt outputs. When the device has multiple interrupt outputs to assert, it will assert them in the order of their relative priority. Common modes of a PIC include hard priorities, rotating...
- IEEE 802.3
IEEE 802.3 is a collection of IEEE standards defining the Physical Layer and Data Link Layer's media access control sublayer of wired Ethernet. This is generally a LAN technology with some WAN applications...
(802.3x PAUSE frames for flow control)
- Ethernet flow control
Ethernet flow control is a mechanism for temporarily stopping the transmission of data on an Ethernet computer network.Ethernet is a specific computer network protocol. Flow control in Ethernet resides on the data link layer...
- Inter-Processor Interrupt
An inter-processor interrupt is a special type of interrupt by which one processor may interrupt another processor in a multiprocessor system. IPIs are typically used to implement a cache coherency synchronization point....
- Interrupt
In computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
- Interrupt Handler
An interrupt handler, also known as an interrupt service routine , is a callback subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt...
- Non-Maskable Interrupt
A non-maskable interrupt is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non-recoverable hardware errors...