Titan (microprocessor)
Encyclopedia
Titan was supposed to be a family of 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....

 Power Architecture
Power Architecture
Power Architecture is a broad term to describe similar RISC instruction sets for microprocessors developed and manufactured by such companies as IBM, Freescale, AMCC, Tundra and P.A. Semi...

-based microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...

 cores designed by Applied Micro Circuits Corporation
Applied Micro Circuits Corporation
Applied Micro Circuits Corporation is a fabless semiconductor company designing network and embedded Power Architecture , and server processor ARM , optical transport and storage solutions...

 (AMCC), but was scrapped in 2010 according to reports. Applied Micro chose to continue development of the PowerPC 400 core instead, on a 40 nm fabrication process.

It was designed to be the foundation of embedded processors
Embedded system
An embedded system is a computer system designed for specific control functions within a larger system. often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. By contrast, a general-purpose computer, such as a personal...

 and system-on-a-chip
System-on-a-chip
A system on a chip or system on chip is an integrated circuit that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate...

 (SoC) solutions. While being high performance, reaching speeds up to 2 GHz, it would remain extremely power efficient, drawing just 2.5 W per core
Multi-core (computing)
A multi-core processor is a single computing component with two or more independent actual processors , which are the units that read and execute program instructions...

. Where there usually is a trade-off between performance and power, AMCC used the Fast14 technology from Intrinsity
Intrinsity
Intrinsity was a privately held Austin, Texas based fabless semiconductor company; it was founded in 1997 as EVSX on the remnants of Exponential Technology and changed its name to Intrinsity in 2000...

 to build an extremely efficient microprocessor design leveraging high performance combined with low power and comparably cheap bulk 90 nm CMOS
CMOS
Complementary metal–oxide–semiconductor is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits...

 manufacturing. By using NMOS
NMOS logic
N-type metal-oxide-semiconductor logic uses n-type metal-oxide-semiconductor field effect transistors to implement logic gates and other digital circuits...

 transistors and no latches, the design results in a chip with fewer transistors than traditional design, thus reducing cost. The design allows for dual core
Multi-core (computing)
A multi-core processor is a single computing component with two or more independent actual processors , which are the units that read and execute program instructions...

 SoC implementations consuming less than 15 W. There were plans for single, dual and quad-core versions.

The Titan had a new superscalar, out of order 8-9 stage core with a novel three-stage cache
Cache
In computer engineering, a cache is a component that transparently stores data so that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere...

 design. Small 4/4 KiB instruction and data caches at "level 0" sit before the traditional 32/32 KiB L1 caches up to 1 MB L2 cache that will be shared between all cores (supporting up to four). The Titan was compliant with the Power ISA v.2.04.

Implementations

  • APM 83290 – The first implementations of the Titan core design, codenamed Gemeni. Two 1.5 GHz cores with FPU, 512 kB shared L2 cache, DDR2 controller, security engine, multi-channel DMA and I/O engine for gigabit Ethernet, PCIe, USB, RapidIO and/or SATA. It began sampling in October 2009 http://www.ppcnux.com/?q=node/7533. The processor is aimed at telecom and control plane applications. It is built using TSMC
    TSMC
    Taiwan Semiconductor Manufacturing Company, Limited or TSMC is the world's largest dedicated independent semiconductor foundry, with its headquarters and main operations located in the Hsinchu Science Park in Hsinchu, Taiwan.-Overview:...

    's 90 nm bulk CMOS fabrication to reduce cost.http://investor.appliedmicro.com/phoenix.zhtml?c=78121&p=irol-newsArticle&ID=1342823

External links

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