ST200 family
Encyclopedia
The ST200 is a family of very long instruction word
(VLIW) processor cores based on technology jointly developed by Hewlett-Packard
Laboratories and STMicroelectronics
under the name Lx. The main application of the ST200 family is embedded media processing.
than to the EPIC
architectures exemplified by the IA-64. Precisely, the Lx is a symmetric clustered architecture, where clusters communicate through explicit send and receive instructions. Each cluster executes up to 4 instructions per cycle with a maximum of one control instruction (goto, jump, call, return), one memory instruction (load, store, pre-fetch), and two multiply instructions per cycle. All arithmetic instructions operate on integer values with operands belonging either to the general register file (64 x 32-bit) or to the branch register file (8 x 1-bit). General register $r0 always reads as zero, while general register $r63 is the link register. In order to eliminate some conditional branches, the Lx architecture also provides partial predication support in the form of conditional selection instructions. There is no division instruction, but a divide step instruction is provided. All instructions are fully pipelined. The RAW latencies are single-cycle except for the load, multiply, compare to branch RAW latencies. The WAR latencies are zero cycles and the WAW latencies are single cycle.
The principal architects for the ST200 Lx implementation
were Paolo Faraboschi (HPL, architecture) and Fred Homewood (STM, microarchitecture). Key members of the architecture and microarchitecture team included Geoffrey Brown (HPL co-lead), Giuseppe Desoli (HP), Gary Vondran (HP), Trefor Southwell (ST), Tony Jarvis (ST), and Alex Starr (ST).
The architecture was really a true cross company development, co-sited for the early duration of the project, lasting some two years.
In digital video, STM reported in 2009 that it had shipped over 40 million systems-on-chip
(SoCs) containing a VLIW processor from the ST200 family. Since many of these SoCs contain multiple ST200s (the STi7200 contains four ST231s), they actually shipped in excess of 70 million of these VLIW processors.
Trace scheduling
compiler and heavily modified by HP to target the embedded domain. Starting with the ST220, STMicroelectronics introduced compilers based on the Open64
technology. In these compilers, the Open64
release has been improved by upgrading its GCC
C and C++ front-end from 2.96 to 2.x and later 3.x, in order to achieve full C++ compliance. The GNU C extensions have been fully implemented in the Open64
, including the asm statements. As a result, the Linux kernel
can be compiled for the ST200.
The other ST200 compilation tools are straightforward ports of GNU as, GNU ld, and GDB.
Very long instruction word
Very long instruction word or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism . A processor that executes every instruction one after the other may use processor resources inefficiently, potentially leading to poor performance...
(VLIW) processor cores based on technology jointly developed by Hewlett-Packard
Hewlett-Packard
Hewlett-Packard Company or HP is an American multinational information technology corporation headquartered in Palo Alto, California, USA that provides products, technologies, softwares, solutions and services to consumers, small- and medium-sized businesses and large enterprises, including...
Laboratories and STMicroelectronics
STMicroelectronics
STMicroelectronics is an Italian-French electronics and semiconductor manufacturer headquartered in Geneva, Switzerland.While STMicroelectronics corporate headquarters and the headquarters for EMEA region are based in Geneva, the holding company, STMicroelectronics N.V. is registered in Amsterdam,...
under the name Lx. The main application of the ST200 family is embedded media processing.
Lx architecture
The Lx architecture is closer to the original VLIW architecture defined by the Trace processor series from MultiflowMultiflow
Multiflow Computer, Inc. , founded in April, 1984 near New Haven, Connecticut, USA, was a manufacturer and seller of minisupercomputer hardware and software embodying the VLIW design style...
than to the EPIC
Explicitly Parallel Instruction Computing
Explicitly parallel instruction computing is a term coined in 1997 by the HP–Intel alliance to describe a computing paradigm that researchers had been investigating since the early 1980s. This paradigm is also called Independence architectures...
architectures exemplified by the IA-64. Precisely, the Lx is a symmetric clustered architecture, where clusters communicate through explicit send and receive instructions. Each cluster executes up to 4 instructions per cycle with a maximum of one control instruction (goto, jump, call, return), one memory instruction (load, store, pre-fetch), and two multiply instructions per cycle. All arithmetic instructions operate on integer values with operands belonging either to the general register file (64 x 32-bit) or to the branch register file (8 x 1-bit). General register $r0 always reads as zero, while general register $r63 is the link register. In order to eliminate some conditional branches, the Lx architecture also provides partial predication support in the form of conditional selection instructions. There is no division instruction, but a divide step instruction is provided. All instructions are fully pipelined. The RAW latencies are single-cycle except for the load, multiply, compare to branch RAW latencies. The WAR latencies are zero cycles and the WAW latencies are single cycle.
The principal architects for the ST200 Lx implementation
were Paolo Faraboschi (HPL, architecture) and Fred Homewood (STM, microarchitecture). Key members of the architecture and microarchitecture team included Geoffrey Brown (HPL co-lead), Giuseppe Desoli (HP), Gary Vondran (HP), Trefor Southwell (ST), Tony Jarvis (ST), and Alex Starr (ST).
The architecture was really a true cross company development, co-sited for the early duration of the project, lasting some two years.
ST200 cores
The ST200 VLIW family currently comprises the ST210, ST220, ST231 cores, which are single-cluster implementations of the Lx architecture. The differences among these cores are minimal:- The ST210 was the first STMicroelectronics product based on the Lx technology.
- The ST220 improved the frequency of the ST210 by adding one execute stage, which had the effect of increasing the maximum latency to 3 cycles from 2.
- The ST231 improved the ST220 architecture with register scoreboarding and 32-bit x 32-bit multiplies for integer and fractional data representations. A MMUMemory management unitA memory management unit , sometimes called paged memory management unit , is a computer hardware component responsible for handling accesses to memory requested by the CPU...
was also added so the ST231 can be used as a host processor.
In digital video, STM reported in 2009 that it had shipped over 40 million systems-on-chip
System-on-a-chip
A system on a chip or system on chip is an integrated circuit that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate...
(SoCs) containing a VLIW processor from the ST200 family. Since many of these SoCs contain multiple ST200s (the STi7200 contains four ST231s), they actually shipped in excess of 70 million of these VLIW processors.
Compiling tools
The first ST210 compiler was the HP Lx compiler developed at HP Labs Cambridge, itself a descendant of the MultiflowMultiflow
Multiflow Computer, Inc. , founded in April, 1984 near New Haven, Connecticut, USA, was a manufacturer and seller of minisupercomputer hardware and software embodying the VLIW design style...
Trace scheduling
Trace scheduling
Trace scheduling is an optimization technique used in compilers for computer programs.A compiler often can, by rearranging its generated machine instructions for faster execution, improve program performance...
compiler and heavily modified by HP to target the embedded domain. Starting with the ST220, STMicroelectronics introduced compilers based on the Open64
Open64
Open64 is an open source, optimizing compiler for the Itanium and x86-64 microprocessor architectures. It derives from the SGI compilers for the MIPS R10000 processor, called MIPSPro. It was initially released in 2000 as GNU GPL software under the name Pro64. The following year, University of...
technology. In these compilers, the Open64
Open64
Open64 is an open source, optimizing compiler for the Itanium and x86-64 microprocessor architectures. It derives from the SGI compilers for the MIPS R10000 processor, called MIPSPro. It was initially released in 2000 as GNU GPL software under the name Pro64. The following year, University of...
release has been improved by upgrading its GCC
GNU Compiler Collection
The GNU Compiler Collection is a compiler system produced by the GNU Project supporting various programming languages. GCC is a key component of the GNU toolchain...
C and C++ front-end from 2.96 to 2.x and later 3.x, in order to achieve full C++ compliance. The GNU C extensions have been fully implemented in the Open64
Open64
Open64 is an open source, optimizing compiler for the Itanium and x86-64 microprocessor architectures. It derives from the SGI compilers for the MIPS R10000 processor, called MIPSPro. It was initially released in 2000 as GNU GPL software under the name Pro64. The following year, University of...
, including the asm statements. As a result, the Linux kernel
Linux kernel
The Linux kernel is an operating system kernel used by the Linux family of Unix-like operating systems. It is one of the most prominent examples of free and open source software....
can be compiled for the ST200.
The other ST200 compilation tools are straightforward ports of GNU as, GNU ld, and GDB.