SSE5

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SSE5

The SSE5 (short for Streaming SIMD
SIMD

In computing, SIMD is a technique employed to achieve data level parallelism....
Extensions version 5), announced by AMD

Advanced Micro Devices

Advanced Micro Devices, Inc. is an United States multinational corporation semiconductor industry company based in Sunnyvale, California, that develops Central processing unit and related technologies for commercial and consumer markets....
on August 30, 2007, is an extension to the 128-bit SSE

Streaming SIMD Extensions

In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! ....
core instructions in the AMD64 instruction set for the Bulldozer

Bulldozer (processor)

Bulldozer is the codename Advanced Micro Devices has given to one of the next-generation CPU cores after the AMD K10 for the company's M-SPACE design methodology, with the core specifically aimed at 10 watt to 100 watt Thermal Design Power computing products....
processor core, due to begin production in 2011.

SSE5 consists of 170 instructions (including 46 base instructions), many of which are designed to improve single-threaded performance. Some SSE5 instructions are 3-operand instructions

Instruction set

An instruction set is a list of all the instruction , and all their variations, that a processor can execute.Instructions include:* Arithmetic such as add and subtract...
, the use of which will increase the average number of instructions per cycle

Instructions Per Cycle

In computer architecture, Instructions Per Clock is a term used to describe one aspect of a central processing unit's performance: the average number of instruction s executed for each clock cycle....
achievable by x86 code.

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Encyclopedia

The SSE5 (short for Streaming SIMD
SIMD

In computing, SIMD is a technique employed to achieve data level parallelism....
Extensions version 5), announced by AMD

Advanced Micro Devices

Streaming SIMD Extensions

Bulldozer (processor)

Instruction set

Instructions Per Cycle

Fused multiply-accumulate
Multiply-accumulate

In computing, especially digital signal processing, multiply-accumulate is a common operation that computes the product of two numbers and adds that product to an accumulator ....
(FMACxx) instructions
Integer multiply-accumulate (IMAC, IMADC) instructions
Permutation (PPERM, PERMPx) and conditional move (PCMOV) instructions
Precision control, rounding, and conversion instructions

AMD claims SSE5 will provide dramatic performance improvements, particularly in high-performance computing

High-performance computing

High-performance computing uses supercomputers and computer clusters to solve advanced computation problems. Today, computer systems approaching the teraflops-region are counted as HPC-computers....
(HPC), multimedia

Multimedia

Multimedia is media and content that utilizes a combination of different content format. The term can be used as a noun or as an adjective describing a medium as having multiple content forms....
and computer security

Computer security

Computer security is a branch of technology known as information security as applied to computers. The objective of computer security can include protection of information from theft or corruption, or the preservation of availability, as defined in the security policy....
applications, including a 5x performance gain for Advanced Encryption Standard

Advanced Encryption Standard

In cryptography, the Advanced Encryption Standard is an encryption standard adopted by the Federal government of the United States. The standard comprises three block ciphers, AES-128, AES-192 and AES-256, adopted from a larger collection originally published as Rijndael. Each AES cipher has a 128 bit block size, with key sizes of 128...
(AES) encryption and a 30% performance gain for discrete cosine transform

Discrete cosine transform

A discrete cosine transform expresses a sequence of finitely many data points in terms of a sum of cosine functions oscillating at different frequency....
(DCT) used to process video streams.

To avoid confusion it is worth noting that (AMD's) SSE5 does not include all (Intel's) SSE4

SSE4

SSE4 is an instruction set used in the Intel Intel Core microarchitecture microarchitecture and AMD_K10. It was announced on September 27, 2006 at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more precise details of 47 instructions became available at the Spring 2007 Intel Developer Forum in Beijing, in the prese...
instructions. In other words, it is not a superset of SSE4 but a competitor to it. Likewise, Intel's pre-Nehalem

Nehalem

Nehalem means "the place where people live" in the Salishan language. Nehalem may refer to one of these Oregon-related articles:* Nehalem, a Native American tribe also known as the Tillamook , after whom many geographic features in Oregon are named...
cores contain only a partial implementation of SSE4, called SSE4.1. This poses some difficulty and extra work for compilers and assembly-level hand tuning of code.

External links

, AnandTech
AnandTech

AnandTech is one of the largest online computer hardware journals in the English-speaking world. AnandTech was founded in 1997 by then 14-year-old Anand Lal Shimpi....
, August 30, 2007, accessed August 30, 2007.
, DailyTech, August 30, 2007, accessed August 30, 2007.

SSE5

See also

External links