Overlay Control
Encyclopedia
Silicon wafers are currently manufactured in a sequence of steps, each stage placing a pattern of material on the wafer; in this way transistors, contacts, etc., all made of different materials, are laid down. In order for the final device to function correctly, these separate patterns must be aligned correctly - for example contacts, lines and transistors must all line up.
Overlay control is the term used to define the control of this pattern-to-pattern alignment. It has always played an important role in semiconductor manufacturing, helping to monitor layer-to-layer alignment on multi-layer device structures. Misalignment of any kind can cause short circuits and connection failures, which in turn impact fab
yield and profit margins.
Overlay control has become even more critical now because the combination of increasing pattern density and innovative techniques such as double patterning
and 193 nm immersion lithography
creates a novel set of pattern-based yield challenges at the 45 nm technology node and below. This combination causes error budgets to shrink below 30 percent of design rules, where existing overlay metrology solutions cannot meet total measurement uncertainty (TMU) requirements.
Overlay metrology solutions with both higher measurement accuracy/precision and process robustness are key factors when addressing increasingly tighter overlay budgets. Higher order overlay control and in-field metrology using smaller, micro-grating or other novel targets are becoming essential for successful production ramps and higher yields at 45 nm and beyond.
Examples of the widely adopted overlay measurement tools worldwide are KLA-Tencor's ARCHER http://www.kla-tencor.com/archer, and the nanometrics http://www.nanometrics.com CALIPER series, overlay metrology platforms.
Overlay control is the term used to define the control of this pattern-to-pattern alignment. It has always played an important role in semiconductor manufacturing, helping to monitor layer-to-layer alignment on multi-layer device structures. Misalignment of any kind can cause short circuits and connection failures, which in turn impact fab
Foundry (electronics)
In the microelectronics industry a semiconductor fabrication plant is a factory where devices such as integrated circuits are manufactured....
yield and profit margins.
Overlay control has become even more critical now because the combination of increasing pattern density and innovative techniques such as double patterning
Double patterning
Multiple patterning is a class of technologies for manufacturing integrated circuits , developed for photolithography to enhance the feature density. The simplest case of multiple patterning is double patterning, where a conventional lithography process is enhanced to produce double the expected...
and 193 nm immersion lithography
Immersion lithography
Immersion lithography is a photolithography resolution enhancement technique for manufacturing integrated circuits that replaces the usual air gap between the final lens and the wafer surface with a liquid medium that has a refractive index greater than one. The resolution is increased by a factor...
creates a novel set of pattern-based yield challenges at the 45 nm technology node and below. This combination causes error budgets to shrink below 30 percent of design rules, where existing overlay metrology solutions cannot meet total measurement uncertainty (TMU) requirements.
Overlay metrology solutions with both higher measurement accuracy/precision and process robustness are key factors when addressing increasingly tighter overlay budgets. Higher order overlay control and in-field metrology using smaller, micro-grating or other novel targets are becoming essential for successful production ramps and higher yields at 45 nm and beyond.
Examples of the widely adopted overlay measurement tools worldwide are KLA-Tencor's ARCHER http://www.kla-tencor.com/archer, and the nanometrics http://www.nanometrics.com CALIPER series, overlay metrology platforms.