Open Verification Methodology
Encyclopedia
The Open Verification Methodology (OVM) is a documented methodology
Methodology
Methodology is generally a guideline for solving a problem, with specificcomponents such as phases, tasks, methods, techniques and tools . It can be defined also as follows:...

 with a supporting building-block library for the verification of semiconductor chip designs. The initial version, OVM 1.0, was released in January, 2008, and regular updates have expanded its functionality. The latest version is OVM 2.1.2, released in January, 2011. The current release and all previous releases are available, under the Apache License
Apache License
The Apache License is a copyfree free software license authored by the Apache Software Foundation . The Apache License requires preservation of the copyright notice and disclaimer....

, on the OVM World site.

The reuse concepts within the OVM were derived mainly from the URM (Universal Reuse Methodology) which was, to a large part, based on the eRM
ERM (e Reuse Methodology)
The e Reuse Methodology was the first reuse methodology to emerge in the Hardware Verification Language space and was used in conjunction with the e Hardware Verification Language. It was invented in 2001 by Verisity Design and was released in 2002...

 (e Reuse Methodology) for the e Verification Language
E (verification language)
e is a hardware verification language which is tailored to implementing highly flexible and reusable verification testbenches.- History :...

 developed by Verisity Design in 2001. The OVM also brings in concepts from the AVM (Advanced Verification Methodology (AVM). The UVM class library brings much automation to the SystemVerilog language such as sequences and data automation features (packing, copy, compare) etc. The UVM also has recommendations for code packaging and naming conventions.

The OVM has won recognition from Electronic Design Magazine
Electronic Design Magazine
First published 55 years ago, Electronic Design is the largest published print magazine for the electronic design industry published in the USA by Penton Media....

 and a DesignVision award from the International Engineering Consortium.

The OVM was co-developed by Mentor Graphics
Mentor Graphics
Mentor Graphics, Inc is a US-based multinational corporation dealing in electronic design automation for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create...

 and Cadence Design Systems
Cadence Design Systems
Cadence Design Systems, Inc is an electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc...

, and they continue to guide its evolution in concert with the nine user companies of the OVM Advisory Group. The OVM is publicly supported by more than 60 partner companies offering tools, training, and services.

The OVM was standardized within Accellera
Accellera
Accellera is a standards organization that supports a mix of user and vendor standards and open interfaces development in the area of electronic design automation and IC design and manufacturing. It is less constrained than the IEEE and is therefore the starting place for many standards. Once...

, which voted to make it the basis for the Universal Verification Methodology
Universal Verification Methodology
The Universal Verification Methodology is a standardized methodology for verifying integrated circuit designs. UVM is derived mainly from the OVM which was, to a large part, based on the eRM for the e Verification Language developed by Verisity Design in 2001...

(UVM). Accellera released version UVM 1.0 EA on May 17, 2010 ..
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