Joel Emer
Encyclopedia
Dr Joel Emer is a pioneer in computer performance
analysis techniques and a microprocessor
architect. He is currently an Intel Fellow. He was the 2009 recipient of the Eckert-Mauchly Award
, an ACM
/IEEE joint award for contributions to computer and digital systems architecture. Dr Emer received his Ph.D. degree from the University of Illinois, Urbana-Champaign under the supervision of Prof. Edward S. Davidson
. His first job immediately after graduation was at Digital Equipment Corporation
where he initially worked on VAX
performance evaluation and then on Alpha
performance evaluation. As a consequence of his performance evaluation work, he became a pioneer in the quantitative approach to computer architecture. In conjunction with the development and application of various performance analysis techniques, he contributed a variety of research and advanced development ideas that were incorporated into various VAX and Alpha designs.
He is well known, along with his co-author Douglas W. Clark, for a seminal paper on the quantitative analysis of processor architectures, which was published in the 11th International Symposium on Computer Architecture
. That paper also contained the result that the VAX-11/780's performance was actually 0.5 MIPS instead of 1 MIPS as was previously claimed by DEC. That result helped popularize what Clark called the Iron Law of Performance that related cycles-per-instruction (CPI), frequency and number of instructions to computer performance
.
Dr Emer has also contributed to simultaneous multithreading
(SMT), memory dependence prediction
via store sets, soft error
analysis, and led the development of the Asim simulator.
Computer performance
Computer performance is characterized by the amount of useful work accomplished by a computer system compared to the time and resources used.Depending on the context, good computer performance may involve one or more of the following:...
analysis techniques and a microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
architect. He is currently an Intel Fellow. He was the 2009 recipient of the Eckert-Mauchly Award
Eckert-Mauchly Award
The Eckert–Mauchly Award recognizes contributions to digital systems and computer architecture. First awarded in 1979, it was named for John Presper Eckert and John William Mauchly, who between 1943 and 1946 collaborated on the design and construction of the first large scale electronic computing...
, an ACM
Association for Computing Machinery
The Association for Computing Machinery is a learned society for computing. It was founded in 1947 as the world's first scientific and educational computing society. Its membership is more than 92,000 as of 2009...
/IEEE joint award for contributions to computer and digital systems architecture. Dr Emer received his Ph.D. degree from the University of Illinois, Urbana-Champaign under the supervision of Prof. Edward S. Davidson
Edward S. Davidson
Edward S. Davidson is a professor emeritus in Electrical Engineering and Computer Science at the University of Michigan, Ann Arbor.His research interests include computer architecture, pipelining theory, parallel processing, performance modeling, intelligent caches, and application tuning...
. His first job immediately after graduation was at Digital Equipment Corporation
Digital Equipment Corporation
Digital Equipment Corporation was a major American company in the computer industry and a leading vendor of computer systems, software and peripherals from the 1960s to the 1990s...
where he initially worked on VAX
VAX
VAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
performance evaluation and then on Alpha
DEC Alpha
Alpha, originally known as Alpha AXP, is a 64-bit reduced instruction set computer instruction set architecture developed by Digital Equipment Corporation , designed to replace the 32-bit VAX complex instruction set computer ISA and its implementations. Alpha was implemented in microprocessors...
performance evaluation. As a consequence of his performance evaluation work, he became a pioneer in the quantitative approach to computer architecture. In conjunction with the development and application of various performance analysis techniques, he contributed a variety of research and advanced development ideas that were incorporated into various VAX and Alpha designs.
He is well known, along with his co-author Douglas W. Clark, for a seminal paper on the quantitative analysis of processor architectures, which was published in the 11th International Symposium on Computer Architecture
International Symposium on Computer Architecture
The International Symposium on Computer Architecture is generally viewed as the top-tier academic conference on computer architecture.-External references:* in the ACM digital library.* in DBLP.* ....
. That paper also contained the result that the VAX-11/780's performance was actually 0.5 MIPS instead of 1 MIPS as was previously claimed by DEC. That result helped popularize what Clark called the Iron Law of Performance that related cycles-per-instruction (CPI), frequency and number of instructions to computer performance
Computer performance
Computer performance is characterized by the amount of useful work accomplished by a computer system compared to the time and resources used.Depending on the context, good computer performance may involve one or more of the following:...
.
Dr Emer has also contributed to simultaneous multithreading
Simultaneous multithreading
Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading...
(SMT), memory dependence prediction
Memory dependence prediction
Memory dependence prediction is a technique, employed by high-performance out-of-order execution microprocessors that execute memory access operations out of program order, to predict true dependences between loads and stores at instruction execution time...
via store sets, soft error
Soft error
In electronics and computing, a soft error is an error in a signal or datum which is wrong. Errors may be caused by a defect, usually understood either to be a mistake in design or construction, or a broken component. A soft error is also a signal or datum which is wrong, but is not assumed to...
analysis, and led the development of the Asim simulator.