DEC Alpha
Encyclopedia
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
reduced instruction set computer
Reduced instruction set computer
Reduced instruction set computing, or RISC , is a CPU design strategy based on the insight that simplified instructions can provide higher performance if this simplicity enables much faster execution of each instruction. A computer based on this strategy is a reduced instruction set computer...
(RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation
Digital Equipment Corporation
Digital Equipment Corporation was a major American company in the computer industry and a leading vendor of computer systems, software and peripherals from the 1960s to the 1990s...
(DEC), designed to replace the 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
VAX
VAX
VAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
complex instruction set computer
Complex instruction set computer
A complex instruction set computer , is a computer where single instructions can execute several low-level operations and/or are capable of multi-step operations or addressing modes within single instructions...
(CISC) ISA and its implementations. Alpha was implemented in microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
s originally developed and fabricated by DEC. These microprocessors were most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards.
Proprietary operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
s that supported Alpha included OpenVMS
OpenVMS
OpenVMS , previously known as VAX-11/VMS, VAX/VMS or VMS, is a computer server operating system that runs on VAX, Alpha and Itanium-based families of computers. Contrary to what its name suggests, OpenVMS is not open source software; however, the source listings are available for purchase...
(previously known as OpenVMS AXP), Tru64 UNIX
Tru64 UNIX
Tru64 UNIX is a 64-bit UNIX operating system for the Alpha instruction set architecture , currently owned by Hewlett-Packard . Previously, Tru64 UNIX was a product of Compaq, and before that, Digital Equipment Corporation , where it was known as Digital UNIX .As its original name suggests, Tru64...
(previously known as DEC OSF/1 AXP and Digital UNIX), and Windows NT
Windows NT
Windows NT is a family of operating systems produced by Microsoft, the first version of which was released in July 1993. It was a powerful high-level-language-based, processor-independent, multiprocessing, multiuser operating system with features comparable to Unix. It was intended to complement...
(until 4.0 SP6
Windows NT 4.0
Windows NT 4.0 is a preemptive, graphical and business-oriented operating system designed to work with either uniprocessor or symmetric multi-processor computers. It was the next release of Microsoft's Windows NT line of operating systems and was released to manufacturing on 31 July 1996...
and Windows 2000
Windows 2000
Windows 2000 is a line of operating systems produced by Microsoft for use on personal computers, business desktops, laptops, and servers. Windows 2000 was released to manufacturing on 15 December 1999 and launched to retail on 17 February 2000. It is the successor to Windows NT 4.0, and is the...
RC1). Free/Libre, Open Source
Open source
The term open source describes practices in production and development that promote access to the end product's source materials. Some consider open source a philosophy, others consider it a pragmatic methodology...
operating systems that run on the Alpha are Linux
Linux
Linux is a Unix-like computer operating system assembled under the model of free and open source software development and distribution. The defining component of any Linux system is the Linux kernel, an operating system kernel first released October 5, 1991 by Linus Torvalds...
(Debian
Debian
Debian is a computer operating system composed of software packages released as free and open source software primarily under the GNU General Public License along with other free software licenses. Debian GNU/Linux, which includes the GNU OS tools and Linux kernel, is a popular and influential...
, Gentoo Linux
Gentoo Linux
Gentoo Linux is a computer operating system built on top of the Linux kernel and based on the Portage package management system. It is distributed as free and open source software. Unlike a conventional software distribution, the user compiles the source code locally according to their chosen...
and Red Hat Linux
Red Hat Linux
Red Hat Linux, assembled by the company Red Hat, was a popular Linux based operating system until its discontinuation in 2004.Red Hat Linux 1.0 was released on November 3, 1994...
), BSD
Berkeley Software Distribution
Berkeley Software Distribution is a Unix operating system derivative developed and distributed by the Computer Systems Research Group of the University of California, Berkeley, from 1977 to 1995...
UNIX (NetBSD
NetBSD
NetBSD is a freely available open source version of the Berkeley Software Distribution Unix operating system. It was the second open source BSD descendant to be formally released, after 386BSD, and continues to be actively developed. The NetBSD project is primarily focused on high quality design,...
, OpenBSD
OpenBSD
OpenBSD is a Unix-like computer operating system descended from Berkeley Software Distribution , a Unix derivative developed at the University of California, Berkeley. It was forked from NetBSD by project leader Theo de Raadt in late 1995...
and FreeBSD
FreeBSD
FreeBSD is a free Unix-like operating system descended from AT&T UNIX via BSD UNIX. Although for legal reasons FreeBSD cannot be called “UNIX”, as the direct descendant of BSD UNIX , FreeBSD’s internals and system APIs are UNIX-compliant...
up to 6.x) and L4Ka::Pistachio
L4 microkernel family
L4 is a family of second-generation microkernels, generally used to implement Unix-like operating systems, but also used in a variety of other systems.L4 was a response to the poor performance of earlier microkernel-base operating systems...
.
The Alpha architecture was sold, along with most parts of DEC, to Compaq
Compaq
Compaq Computer Corporation is a personal computer company founded in 1982. Once the largest supplier of personal computing systems in the world, Compaq existed as an independent corporation until 2002, when it was acquired for US$25 billion by Hewlett-Packard....
in 1998. Compaq, already an Intel customer, decided to phase out Alpha in favor of the forthcoming Hewlett-Packard
Hewlett-Packard
Hewlett-Packard Company or HP is an American multinational information technology corporation headquartered in Palo Alto, California, USA that provides products, technologies, softwares, solutions and services to consumers, small- and medium-sized businesses and large enterprises, including...
/Intel Itanium
Itanium
Itanium is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture . Intel markets the processors for enterprise servers and high-performance computing systems...
architecture, and sold all Alpha intellectual property
Intellectual property
Intellectual property is a term referring to a number of distinct types of creations of the mind for which a set of exclusive rights are recognized—and the corresponding fields of law...
to Intel in 2001, effectively killing the product. Hewlett-Packard purchased Compaq later that same year, continuing development of the existing product line until 2004, and promising to continue selling Alpha-based systems, largely to the existing customer base, until October 2006 (later extended to April 2007).
History
Alpha was born out of an earlier RISC project named PRISMDEC PRISM
PRISM was a 32-bit RISC instruction set architecture developed by Digital Equipment Corporation . It was the final outcome of a number of DEC research projects from the 1982–1985 time-frame, and was at the point of delivering silicon in 1988 when the management canceled the project...
, itself the final product of several earlier projects. PRISM was canceled after a proposal by the Palo Alto design team to build the Unix-only workstations (DECstation
DECstation
The DECstation was a brand of computers used by DEC, and refers to three distinct lines of computer systems—the first released in 1978 as a word processing system, and the latter two both released in 1989. These comprised a range of computer workstations based on the MIPS architecture and a...
3100) on a MIPS R2000 processor, allowing the DECstation to come to market sooner. Among the differences between PRISM and other RISC processors, however, was that PRISM supported a user-programmable microcode
Microcode
Microcode is a layer of hardware-level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in special high-speed memory and translates machine instructions into sequences of detailed...
known as Epicode. PRISM had been designed with the intent of releasing a new operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
along with it, known as Mica, which would allow it to run "native" programs at full speed while also supporting Digital's existing VMS
OpenVMS
OpenVMS , previously known as VAX-11/VMS, VAX/VMS or VMS, is a computer server operating system that runs on VAX, Alpha and Itanium-based families of computers. Contrary to what its name suggests, OpenVMS is not open source software; however, the source listings are available for purchase...
programs from the VAX
VAX
VAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
after minor conversion. DEC management doubted the need to produce a new computer architecture to replace their existing VAX and DECstation lines, and eventually ended the PRISM project in 1988.
By the time of cancellation, however, second-generation RISC chips (such as the newer SPARC
SPARC
SPARC is a RISC instruction set architecture developed by Sun Microsystems and introduced in mid-1987....
architecture), were offering much better price/performance ratio
Price/performance ratio
In economics and engineering, the price/performance ratio refers to a product's ability to deliver performance, of any sort, for its price. Generally speaking, products with a higher price/performance ratio are more desirable, excluding other factors....
s than the VAX lineup. It was clear a third generation would completely outperform the VAX in all ways, not just on cost. Another study was started to see if a new RISC architecture could be defined that could directly support the VMS operating system. The new design used most of the basic PRISM concepts, but was re-tuned to allow VMS and VMS programs to run at reasonable speed with no conversion at all. The decision was also made to upgrade the design to a full 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
implementation from PRISM's 32-bit, a conversion all of the major RISC vendors were undertaking. Eventually that new architecture became Alpha. The primary Alpha instruction set architects were Richard L. Sites and Richard T. Witek. The PRISM's Epicode was developed into the Alpha's PALcode
PALcode
In computing, in the Alpha instruction set architecture, PALcode is the name used by DEC for a set of functions in the SRM or AlphaBIOS firmware, providing a hardware abstraction layer for system software, covering features such as cache management, translation lookaside buffer miss handling,...
, providing an abstracted interface to platform- and processor implementation-specific features.
The main contribution of Alpha to the microprocessor industry, and the main reason for its excellent performance, was not so much the architecture but rather superb implementation . At that time (as it is now), the microchip industry was dominated by automated design and layout tools. The chip designers at Digital continued pursuing sophisticated manual circuit design in order to deal with the overly complex VAX architecture. The Alpha chips showed that manual circuit design applied to a simpler, cleaner architecture allowed for much higher operating frequencies than those that were possible with the more automated design systems. These chips caused a renaissance of custom circuit design within the microprocessor design community.
Originally, the Alpha processors were designated the DECchip 21x64 series, with "DECchip" replaced in the mid-1990s with "Alpha". The first two digits, "21" signifies the 21st century, and the last two digits, "64" signifies 64 bits. The Alpha was designed as 64-bit from the start and there is no 32-bit version. The middle digit corresponded to the generation of the Alpha architecture. Internally, Alpha processors were also identified by EV numbers, EV officially standing for "Extended VAX" but having an alternative humorous meaning of "Electric Vlasic", giving homage to the Electric Pickle experiment at Western Research Lab.
The first few generations of the Alpha chips were some of the most innovative of their time. The first version, the Alpha 21064
Alpha 21064
The Alpha 21064 is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced as the DECchip 21064 before it was renamed in 1994. The 21064 is also known by its code name, EV4...
or EV4, was the first CMOS
CMOS
Complementary metal–oxide–semiconductor is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits...
microprocessor whose operating frequency rivalled higher-powered ECL
Emitter coupled logic
In electronics, emitter-coupled logic , is a logic family that achieves high speed by using an overdriven BJT differential amplifier with single-ended input, whose emitter current is limited to avoid the slow saturation region of transistor operation....
minicomputers and mainframes. The second, 21164 or EV5, was the first microprocessor to place a large secondary cache on chip. The third, 21264 or EV6, was the first microprocessor to combine both high operating frequency and the more complicated out-of-order execution
Out-of-order execution
In computer engineering, out-of-order execution is a paradigm used in most high-performance microprocessors to make use of instruction cycles that would otherwise be wasted by a certain type of costly delay...
microarchitecture. The 21364 or EV7 was the first high performance processor to have an on-chip memory controller
Memory controller
The memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor...
. The unproduced 21464
Alpha 21464
The Alpha 21464 is an unfinished microprocessor that implements the Alpha instruction set architecture developed by Digital Equipment Corporation and later by Compaq after it acquired Digital. The microprocessor was also known as EV8 or Araña, the latter being its code-name...
or EV8 would have been the first to include simultaneous multithreading
Simultaneous multithreading
Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading...
, but this version was canceled after the sale of DEC to Compaq
Compaq
Compaq Computer Corporation is a personal computer company founded in 1982. Once the largest supplier of personal computing systems in the world, Compaq existed as an independent corporation until 2002, when it was acquired for US$25 billion by Hewlett-Packard....
. The Tarantula research project, which most likely would have been called EV9, would have been the first Alpha processor to feature a vector unit
Vector processor
A vector processor, or array processor, is a central processing unit that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors. This is in contrast to a scalar processor, whose instructions operate on single data items...
.
A persistent report attributed to DEC insiders suggests the choice of the AXP tag for the processor was made by DEC's legal department, which was still smarting from the VAX trademark fiasco. After a lengthy search the tag "AXP" was found to be entirely unencumbered. Within the computer industry, a joke got started that the acronym AXP meant "Almost eXactly PRISM".
Design principles
The Alpha architecture was intended to be a high-performance design. Digital intended the architecture to support a one-thousandfold increase in performance over twenty-five years. To ensure this, any architectural feature that impeded multiple instruction issue, clock rate or multiprocessing was removed. As a result, the Alpha does not have:- Branch delay slotBranch delay slotIn computer architecture, a delay slot is an instruction slot that gets executed without the effects of a preceding instruction. The most common form is a single arbitrary instruction located immediately after a branch instruction on a RISC or DSP architecture; this instruction will execute even if...
s - Suppressed instructions
- Byte load or store instructions (later added with the Byte Word Extensions (BWX))
Condition codes
The Alpha does not have condition codes for integer instructions to remove a potential bottleneck at the condition status register. Instructions resulting in an overflow, such as adding two numbers whose result does not fit in 64 bits, write the 32 or 64 least significant bitLeast significant bit
In computing, the least significant bit is the bit position in a binary integer giving the units value, that is, determining whether the number is even or odd. The lsb is sometimes referred to as the right-most bit, due to the convention in positional notation of writing less significant digits...
s to the destination register. The carry is generated by performing an unsigned compare on the result with either operand to see if the result is smaller than either operand. If the test was true, the value one is written to the least significant bit of the destination register to indicate the condition.
Registers
The architecture defined a set of 32 integer registerProcessor register
In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are addressed by mechanisms other than main memory and can be accessed more quickly...
s and a set of 32 floating-point registers in addition to a program counter
Program counter
The program counter , commonly called the instruction pointer in Intel x86 microprocessors, and sometimes called the instruction address register, or just part of the instruction sequencer in some computers, is a processor register that indicates where the computer is in its instruction sequence...
, two lock registers and a floating-point control register (FPCR). It also defined registers that were optional, implemented only if the implementation required them. Lastly, registers for PALcode
PALcode
In computing, in the Alpha instruction set architecture, PALcode is the name used by DEC for a set of functions in the SRM or AlphaBIOS firmware, providing a hardware abstraction layer for system software, covering features such as cache management, translation lookaside buffer miss handling,...
were defined.
The integer registers were denoted as R0 to R31 and floating-point registers were denoted as F0 to F31. The R31 and F31 registers were hardwired to zero and writes to those registers by instructions are ignored. Digital considered using a combined register file, but a split register file was determined to be better as it enabled two-chip implementations to have a register file located on each chip and integer-only implementations to omit the floating-point register file containing the floating point registers. A split register file was also determined to be more suitable for multiple instruction issue due to the reduced number of read and write ports. The number of registers per register file was also considered, with 32 and 64 being contenders. Digital concluded that 32 registers was more suitable as it required less die
Die (integrated circuit)
A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
space, which improved clock frequencies. This number of registers was deemed not to be a major issue in respect to performance and future growth, as thirty-two registers could support at least eight-way instruction issue.
The program counter
Program counter
The program counter , commonly called the instruction pointer in Intel x86 microprocessors, and sometimes called the instruction address register, or just part of the instruction sequencer in some computers, is a processor register that indicates where the computer is in its instruction sequence...
is a 64-bit register which contains a longword-aligned virtual byte address, that is, the low two bits of the program counter are always zero. The PC is incremented by four to the address of the next instruction when an instruction is decoded. A lock flag and locked physical address register are used by the load-locked and store-conditional instructions for multiprocessor support. The floating-point control register (FPCR) is a 64-bit register defined by the architecture intended for use by Alpha implementations with IEEE 754-compliant floating-point hardware.
Data types
In the Alpha architecture, a byteByte
The byte is a unit of digital information in computing and telecommunications that most commonly consists of eight bits. Historically, a byte was the number of bits used to encode a single character of text in a computer and for this reason it is the basic addressable element in many computer...
was defined as an 8-bit
8-bit
The first widely adopted 8-bit microprocessor was the Intel 8080, being used in many hobbyist computers of the late 1970s and early 1980s, often running the CP/M operating system. The Zilog Z80 and the Motorola 6800 were also used in similar computers...
datum
Data (computing)
In computer science, data is information in a form suitable for use with a computer. Data is often distinguished from programs. A program is a sequence of instructions that detail a task for the computer to perform...
, a word as a 16-bit
16-bit
-16-bit architecture:The HP BPC, introduced in 1975, was the world's first 16-bit microprocessor. Prominent 16-bit processors include the PDP-11, Intel 8086, Intel 80286 and the WDC 65C816. The Intel 8088 was program-compatible with the Intel 8086, and was 16-bit in that its registers were 16...
datum, a longword as a 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
datum, a quadword as a 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
datum and an octaword as a 128-bit
128-bit
There are currently no mainstream general-purpose processors built to operate on 128-bit integers or addresses, though a number of processors do operate on 128-bit data. The IBM System/370 could be considered the first rudimentary 128-bit computer as it used 128-bit floating point registers...
datum.
The Alpha architecture originally defined six data types:
- Quadword (64-bit) integer
- Longword (32-bit) integer
- IEEE T-floating-point (double precision, 64-bit)
- IEEE S-floating-point (single precision, 32-bit)
To maintain a level of compatibility with VAX, the 32-bit architecture the Alpha succeeded, two VAX data types were included:
- VAX G-floating point (double precision, 64-bit)
- VAX F-floating point (single precision, 32-bit)
The Alpha had some provision for future expansion of the instruction set to include 128-bit data types.
Memory
The Alpha has a 64-bit linear virtual addressVirtual address
In computer technology, a virtual address is an address identifying a virtual, i.e. non-physical, entity.-Description:The term virtual address is most commonly used for an address pointing to virtual memory or, in networking, when referring to a virtual network address...
space with no memory segmentation. Implementations can implement a smaller virtual address space with a minimum size of 43 bits. Although the unused bits were not implemented in hardware such as TLBs, the architecture required implementations to check if they are zero to ensure software compatibility with implementations that implemented a larger or the full virtual address space.
Instruction formats
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | Type |
| Opcode | Ra | Rb | Unused | 0 | Function | Rc | Integer operate | |||||||||||||||||||||||||
| Opcode | Ra | Literal | 1 | Function | Rc | Integer operate, literal | ||||||||||||||||||||||||||
| Opcode | Ra | Rb | Function | Rc | Floating-point operate | |||||||||||||||||||||||||||
| Opcode | Ra | Rb | Displacement | Memory format | ||||||||||||||||||||||||||||
| Opcode | Ra | Displacement | Branch format | |||||||||||||||||||||||||||||
| Opcode | Function | CALL_PAL format | ||||||||||||||||||||||||||||||
The Alpha ISA has a fixed instruction length of 32 bits. It has six instruction formats.
The integer operate format is used by integer instructions. It contains a 6-bit opcode field, followed by the Ra field, which specifies the register containing the first operand and the Rb field, specifies the register containing the second operand. Next is a 3-bit field which is unused and reserved. A 1-bit field contains a "0", which distinguished this format from the integer literal format. A 7-bit function field follows, which is used in conjunction with the opcode to specify an operation. The last field is the Rc field, which specifies the register which the result of a computation should be written to. The register fields are all 5 bits long, required to address 32 unique locations, the 32 integer registers.
The integer literal format is used by integer instructions which use a literal as one of the operands. The format is the same as the integer operate format except for the replacement of the 5-bit Rb field and the 3 bits of unused space with an 8-bit literal field which is zero-extended to a 64-bit operand.
The floating-point operate format is used by floating-point instructions. It is similar to the integer operate format, but has an 11-bit function field made possible by using the literal and unused bits which are reserved in integer operate format.
The memory format is used mostly by load and store instructions. It has a 6-bit opcode field, a 5-bit Ra field, a 5-bit Rb field and a 16-bit displacement field.
Branch instructions have a 6-bit opcode field, a 5-bit Ra field and a 21-bit displacement field. The Ra field specifies a register to be tested by a conditional branch instruction, and if the condition is met, the program counter is updated by adding the contents of the displacement field with the program counter. The displacement field contains a signed integer and if the value of the integer is positive, if the branch is taken then the program counter is incremented. If the value of the integer is negative, then program counter is decremented if the branch is taken. The range of a branch is 1,048,576. The Alpha Architecture was designed with a large range as part of the architecture's forward-looking goal.
The CALL_PAL format is used by the
CALL_PAL instruction, which is used to call PALcodePALcode
In computing, in the Alpha instruction set architecture, PALcode is the name used by DEC for a set of functions in the SRM or AlphaBIOS firmware, providing a hardware abstraction layer for system software, covering features such as cache management, translation lookaside buffer miss handling,...
subroutines. The format retains the opcode field but replaces the others with a 26-bit function field, which contains an integer specifying a PAL subroutine.
Control instructions
The controlControl flow
In computer science, control flow refers to the order in which the individual statements, instructions, or function calls of an imperative or a declarative program are executed or evaluated....
instructions consist of conditional and unconditional branches, and jumps. The conditional and unconditional branch instructions use the branch instruction format, while the jump instructions use the memory instruction format.
Conditional branches test the least significant bit of a register is set or clear, or compare a register as a signed quadword to zero, and branch if the specified condition is true. These conditions available for comparing a register to zero are equality, inequality, less than, less than or equal to, greater than or equal to, and greater than. The new address is computed by longword aligning and sign extending the 21-bit displacement and adding it to the address of the instruction following the conditional branch.
Unconditional branches update the program counter with a new address computed in the same way as conditional branches. They also save the address of the instruction following the unconditional branch to a register. There are two such instructions, and they differ only in the hints provided for the branch prediction hardware.
There are four jump instructions. These all perform the same operation, saving the address of the instruction following the jump, and providing the program counter with a new address from a register. They differ in the hints provided to the branch prediction hardware. The unused displacement field is used for this purpose.
Integer arithmetic
The integer arithmetic instructions perform addition, multiplication, and subtraction on longwords and quadwords; and comparison on quadwords. There is no instruction(s) for division as the architects considered the implementation of division in hardware to be adverse to simplicity. In addition to the standard add and subtract instructions, there are scaled versions. These versions shift the second operand to the left by two or three bits before adding or subtracting. The Multiply Longword and Multiply Quadword instructions write the least significant 32 or 64 bits of a 64- or 128-bit result to the destination register, respectively. Since it is useful to obtain the most significant half, the Unsigned Multiply Quadword High (UMULH) instruction is provided. UMULH is used for implementing multi-precision arithmetic and division algorithms. The concept of a separate instruction for multiplication that returns the most significant half of a result was taken from PRISMDEC PRISM
PRISM was a 32-bit RISC instruction set architecture developed by Digital Equipment Corporation . It was the final outcome of a number of DEC research projects from the 1982–1985 time-frame, and was at the point of delivering silicon in 1988 when the management canceled the project...
.
The instructions that operate on longwords ignore the most significant half of the register and the 32-bit result is sign-extended before it is written to the destination register. By default, the add, multiply, and subtract instructions, with the exception of UMULH and scaled versions of add and subtract, do no trap on overflow. When such functionality is required, versions of these instructions that perform overflow detection and trap on overflow are provided.
The compare instructions compare two registers or a register and a literal and write '1' to the destination register if the specified condition is true or '0' if not. The conditions are equality, inequality, less than or equal to, and less than. With the exception of the instructions that specify the former two conditions, there are versions that perform signed and unsigned compares.
The integer arithmetic instructions use the integer operate instruction formats.
Logical and shift
The logical instructions consist of those for performing bitwiseBitwise operation
A bitwise operation operates on one or more bit patterns or binary numerals at the level of their individual bits. This is used directly at the digital hardware level as well as in microcode, machine code and certain kinds of high level languages...
logical operations and conditional moves on the integer registers. The bitwise logical instructions perform AND
Logical conjunction
In logic and mathematics, a two-place logical operator and, also known as logical conjunction, results in true if both of its operands are true, otherwise the value of false....
, NAND
Sheffer stroke
In Boolean functions and propositional calculus, the Sheffer stroke, named after Henry M. Sheffer, written "|" , "Dpq", or "↑", denotes a logical operation that is equivalent to the negation of the conjunction operation, expressed in ordinary language as "not both"...
, NOR
Nor
Nor may refer to:*In grammar, nor is a coordinating conjunction*Nór, the eponymous founder-king of Norway in Norse mythology*Nor , a character in the book in Wicked...
, OR
Logical disjunction
In logic and mathematics, a two-place logical connective or, is a logical disjunction, also known as inclusive disjunction or alternation, that results in true whenever one or more of its operands are true. E.g. in this context, "A or B" is true if A is true, or if B is true, or if both A and B are...
, XNOR, and XOR between two registers or a register and literal. The conditional move instructions test a register as a signed quadword to zero and move if the specified condition is true. The specified conditions are equality, inequality, less than or equal to, less than, greater than or equal to, and greater than. The shift instructions perform arithmetic right shift
Arithmetic shift
In computer programming, an arithmetic shift is a shift operator, sometimes known as a signed shift . For binary numbers it is a bitwise operation that shifts all of the bits of its operand; every bit in the operand is simply moved a given number of bit positions, and the vacant bit-positions are...
, and logical left and right shifts
Logical shift
In computer science, a logical shift is a bitwise operation that shifts all the bits of its operand. Unlike an arithmetic shift, a logical shift does not preserve a number's sign bit or distinguish a number's exponent from its mantissa; every bit in the operand is simply moved a given number of bit...
. The shift amount is given by a register or literal. Logical and shift instructions use the integer operate instruction formats.
Byte-Word Extensions (BWX)
Later, the Alpha included byte-word extensions, a set of instructions to manipulate 8-bit and 16-bit data types. These instructions were first introduced in the 21164A (EV56) microprocessor and are present in all subsequent implementations. These instructions performed operations that previously required multiple instructions to implement, which improved code density and the performance of certain applications. BWX also made the emulation of x86 machine code and the writing of device driverDevice driver
In computing, a device driver or software driver is a computer program allowing higher-level computer programs to interact with a hardware device....
s easier.
| Mnemonic | Instruction |
|---|---|
| LDBU | Load Zero-Extended Byte from Memory to Register |
| LDWU | Load Zero-Extended Word from Memory to Register |
| SEXTB | Sign Extend Byte |
| SEXTW | Sign Extend Word |
| STB | Store Byte from Register to Memory |
| STW | Store Word from Register to Memory |
Motion Video Instructions (MVI)
Motion Video Instructions (MVI) was an instruction set extension to the Alpha ISA that added instructions for single instruction, multiple dataSIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
(SIMD) operations. Alpha implementations that implement MVI, in chronological order, are the Alpha 21164PC (PCA56 and PCA57), Alpha 21264
Alpha 21264
The Alpha 21264 was a Digital Equipment Corporation RISC microprocessor introduced in October, 1996. The 21264 implemented the Alpha instruction set architecture .- Description :...
(EV6) and Alpha 21364
Alpha 21364
The Alpha 21364, code-named "Marvel", also known as EV7 is a microprocessor developed by Digital Equipment Corporation , later Compaq Computer Corporation, that implemented the Alpha instruction set architecture .- History :...
(EV7). Unlike other SIMD instruction sets of the same period such as MIPS' MDMX
MDMX
The MDMX , also known as MaDMaX, is an extension to the MIPS instruction set architecture released in October 1996 at the Microprocessor Forum.- History :...
or Sun Microsystems
Sun Microsystems
Sun Microsystems, Inc. was a company that sold :computers, computer components, :computer software, and :information technology services. Sun was founded on February 24, 1982...
' Visual Instruction Set
Visual Instruction Set
Visual Instruction Set, or VIS, is a SIMD instruction set for SPARC V9 microprocessors developed by Sun Microsystems. There are three versions of VIS: VIS 1, VIS 2 and VIS 2+...
, MVI was a simple instruction set composed of a few instructions that operate on integer data types stored in existing integer registers.
MVI's simplicity was due to two reasons. Firstly, Digital had determined that the Alpha 21164
Alpha 21164
The Alpha 21164, also known by its code name, EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced in January 1995, succeeding the Alpha 21064A as Digital's flagship microprocessor...
was already capable of performing DVD
DVD
A DVD is an optical disc storage media format, invented and developed by Philips, Sony, Toshiba, and Panasonic in 1995. DVDs offer higher storage capacity than Compact Discs while having the same dimensions....
decoding through software, therefore not requiring hardware provisions for the purpose, but was inefficient in MPEG-2
MPEG-2
MPEG-2 is a standard for "the generic coding of moving pictures and associated audio information". It describes a combination of lossy video compression and lossy audio data compression methods which permit storage and transmission of movies using currently available storage media and transmission...
encoding. The second reason was the requirement to retain the fast cycle times of implementations. Adding many instructions would have complicated and enlarged the instruction decode logic, reducing an implementation's clock frequency.
MVI consisted of 13 instructions:
| Mnemonic | Instruction |
|---|---|
| MAXSB8 | Vector Signed Byte Maximum |
| MAXSW4 | Vector Signed Word Maximum |
| MAXUB8 | Vector Unsigned Byte Maximum |
| MAXUW4 | Vector Unsigned Word Maximum |
| MINSB8 | Vector Signed Byte Minimum |
| MINSW4 | Vector Signed Word Minimum |
| MINUB8 | Vector Unsigned Byte Minimum |
| MINUW4 | Vector Unsigned Word Minimum |
| PERR | Pixel Error |
| PKLB | Pack Longwords to Bytes |
| PKWB | Pack Words to Bytes |
| UNPKBL | Unpack Bytes to Longwords |
| UNPKBW | Unpack Bytes to Words |
Floating-point Extensions (FIX)
Floating-point extensions (FIX) was an extension the Alpha Architecture. It introduced nine instructions for floating-point square-root and for transferring data to and from the integer registers and floating-point registers. The Alpha 21264Alpha 21264
The Alpha 21264 was a Digital Equipment Corporation RISC microprocessor introduced in October, 1996. The 21264 implemented the Alpha instruction set architecture .- Description :...
(EV6) was the first microprocessor to implement these instructions.
| Mnemonic | Instruction |
|---|---|
| FTOIS | Floating-point to Integer Register Move, S_floating |
| FTOIT | Floating-point to Integer Register Move, T_floating |
| ITOFF | Integer to Floating-point Register Move, F_floating |
| ITOFS | Integer to Floating-point Register Move, S_floating |
| ITOFT | Integer to Floating-point Register Move, T_floating |
| SQRTF | Square root F_floating |
| SQRTG | Square root G_floating |
| SQRTS | Square root S_floating |
| SQRTT | Square root T_floating |
Count Extensions (CIX)
Count Extensions (CIX) was an extension to the architecture which introduced three instructions for counting bits. These instructions were categorized as integer arithmetic instructions. They were first implemented on the Alpha 21264A (EV67).| Mnemonic | Instruction |
|---|---|
| CTLZ | Count Leading Zero |
| CTPOP | Count Population |
| CTTZ | Count Trailing Zero |
Implementations
At the time of its announcement, Alpha was heralded as an architecture for the next 25 years. While this was not to be, Alpha has nevertheless had a reasonably long life. The first version, the Alpha 21064Alpha 21064
The Alpha 21064 is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced as the DECchip 21064 before it was renamed in 1994. The 21064 is also known by its code name, EV4...
(otherwise known as the EV4) was introduced in November 1992 running at up to 192 MHz; a slight shrink of the die (the EV4S, shrunk from 0.75 µm to 0.675 µm) ran at 200 MHz a few months later. The 64-bit processor was a superpipelined and superscalar
Superscalar
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate...
design, like other RISC designs, but nevertheless outperformed them all and DEC touted it as the world's fastest processor. Careful attention to circuit design, a hallmark of the Hudson design team, like a huge centralized clock circuitry, allowed them to run the CPU at higher speeds, even though the microarchitecture was fairly similar to other RISC chips. In comparison, the less expensive Intel Pentium ran at 66 MHz when it was launched the following spring.
The Alpha 21164
Alpha 21164
The Alpha 21164, also known by its code name, EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced in January 1995, succeeding the Alpha 21064A as Digital's flagship microprocessor...
or EV5 became available in 1995 at processor frequencies of up to 333 MHz. In July 1996 the line was speed bumped to 500 MHz, in March 1998 to 666 MHz. Also in 1998 the Alpha 21264
Alpha 21264
The Alpha 21264 was a Digital Equipment Corporation RISC microprocessor introduced in October, 1996. The 21264 implemented the Alpha instruction set architecture .- Description :...
(EV6) was released at 450 MHz, eventually reaching (in 2001 with the 21264C/EV68CB) 1.25 GHz. In 2003, the Alpha 21364
Alpha 21364
The Alpha 21364, code-named "Marvel", also known as EV7 is a microprocessor developed by Digital Equipment Corporation , later Compaq Computer Corporation, that implemented the Alpha instruction set architecture .- History :...
or EV7 Marvel was launched, essentially an EV68 core with four 1.6 GB/s inter-processor communication links for improved multiprocessor
Multiprocessor
Computer system having two or more processing units each sharing main memory and peripherals, in order to simultaneously process programs.Sometimes the term Multiprocessor is confused with the term Multiprocessing....
system performance, running at 1 or 1.15 GHz.
In 1996, the production of Alpha chips was licensed to Samsung Electronics Company
Samsung Electronics
Samsung Electronics is a South Korean multinational electronics and information technology company headquartered in Samsung Town, Seoul...
. Following the purchase of Digital by Compaq
Compaq
Compaq Computer Corporation is a personal computer company founded in 1982. Once the largest supplier of personal computing systems in the world, Compaq existed as an independent corporation until 2002, when it was acquired for US$25 billion by Hewlett-Packard....
the majority of the Alpha products were placed with API NetWorks, Inc. (previously Alpha Processor Inc.), a private company funded by Samsung and Compaq. In October 2001, Microway
Microway
Microway Inc is an American high-end computer manufacturer that makes servers and clustering products. The company was founded in 1982 to write software to support the Intel 8087. Soon thereafter, Microway Inc began to manufacture hardware add-ons for X86-based computers for use by scientists and...
became the exclusive sales and service provider of API NetWorks' Alpha-based product line.
On June 25, 2001, Compaq announced that Alpha would be phased out by 2004 in favor of Intel's Itanium
Itanium
Itanium is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture . Intel markets the processors for enterprise servers and high-performance computing systems...
, canceled the planned EV8
Alpha 21464
The Alpha 21464 is an unfinished microprocessor that implements the Alpha instruction set architecture developed by Digital Equipment Corporation and later by Compaq after it acquired Digital. The microprocessor was also known as EV8 or Araña, the latter being its code-name...
chip, and sold all Alpha intellectual property to Intel. HP, new owner of Compaq later the same year, announced that development of the Alpha series would continue for a few more years, including the release of a 1.3 GHz EV7 variant called the EV7z. This would be the final iteration of Alpha, the 0.13 µm EV79 also being canceled.
Alpha was also implemented in the Piranha, a research prototype developed by Compaq's Corporate Research and Nonstop Hardware Development groups at the Western Research Laboratory and Systems Research Center. Piranha was a multicore
Multicore
Multicore may refer to:* Multi-core processor ** Multicore Association, founded in 2005, a non-profit, industry consortium focused on multicore technology* multicore cable, a generic term for an electrical cable that has multiple cores...
design for transaction processing
Transaction processing
In computer science, transaction processing is information processing that is divided into individual, indivisible operations, called transactions. Each transaction must succeed or fail as a complete unit; it cannot remain in an intermediate state...
workloads that contained eight simple cores. It was described at the 27th Annual International Symposium on Computer Architecture in June 2000.
Model history
| Model | Model number | Year | Frequency [MHz] | Process [µm] | Transistors [millions] | Die size [mm2] | IO Pins | Power [W] | Voltage | Dcache [KB] | Icache [KB] | Scache | Bcache | ISA | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| EV4 | 21064 Alpha 21064 The Alpha 21064 is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced as the DECchip 21064 before it was renamed in 1994. The 21064 is also known by its code name, EV4... |
1992 | 100–200 | 0.75 | 1.68 | 234 | 290 | 30 | 3.3 | 8 | 8 | – | 128 KB–16 MB | ||
| EV4S | 21064 | 1993 | 100–200 | 0.675 | 1.68 | 186 | 290 | 27 | 3.3 | 8 | 8 | – | 128 KB–16 MB | ||
| EV45 | 21064A | 1994 | 200–300 | 0.5 | 2.85 | 164 | 33 | 3.3 | 16 | 16 | – | 256 KB–16 MB | |||
| LCA4 | 21066 | 1993 | 100–166 | 0.675 | 1.75 | 209 | 21 | 3.3 | 8 | 8 | – | ||||
| LCA4 | 21068 | 1994 | 66 | 0.675 | 1.75 | 209 | 9 | 3.3 | 8 | 8 | – | ||||
| LCA45 | 21066A | 1994 | 100–266 | 0.5 | 1.8 | 161 | 23 | 3.3 | 8 | 8 | – | ||||
| LCA45 | 21068A | 1994 | 100 | 0.5 | 1.8 | 161 | 3.3 | 8 | 8 | – | |||||
| EV5 | 21164 Alpha 21164 The Alpha 21164, also known by its code name, EV5, is a microprocessor developed and fabricated by Digital Equipment Corporation that implemented the Alpha instruction set architecture . It was introduced in January 1995, succeeding the Alpha 21064A as Digital's flagship microprocessor... |
1995 | 266–500 | 0.5 | 9.3 | 299 | 296 | 56 | 3.3/2.5 | 8 | 8 | 96 KB | Up to 64 MB | R | |
| EV56 | 21164A | 1996 | 366–666 | 0.35 | 9.66 | 209 | 31–55 | 3.3/2.5 | 8 | 8 | 96 KB | Up to 64 MB | R,B | ||
| PCA56 | 21164PC | 1997 | 400–533 | 0.35 | 3.5 | 141 | 264 | 26–35 | 3.3/2.5 | 8 | 16 | – | 512 KB–4 MB | R,B,M | |
| PCA57 | 21164PC | 600–666 | 0.28 | 5.7 | 101 | 283 | 18–23 | 2.5/2.0 | 16 | 32 | – | 512 KB–4 MB | R,B,M | ||
| EV6 | 21264 Alpha 21264 The Alpha 21264 was a Digital Equipment Corporation RISC microprocessor introduced in October, 1996. The 21264 implemented the Alpha instruction set architecture .- Description :... |
1998 | 450–600 | 0.35 | 15.2 | 314 | 389 | 73 | 2.0 | 64 | 64 | – | 2–8 MB | R,B,M,F | |
| EV67 | 21264A | 1999 | 600–750 | 0.25 | 15.2 | 210 | 389 | 2.0 | 64 | 64 | – | 2–8 MB | R,B,M,F,C | ||
| EV68AL | 21264B | 2001 | 800–833 | 0.18 | 15.2 | 125 | 1.7 | 64 | 64 | – | 2–8 MB | R,B,M,F,C,T | |||
| EV68CB | 21264C | 2001 | 1000–1250 | 0.18 | 15.2 | 125 | 65–75 | 1.65 | 64 | 64 | – | 2–8 MB | R,B,M,F,C,T | ||
| EV68CX | 21264D | 1.65 | 64 | 64 | – | 2–8 MB | R,B,M,F,C,T | ||||||||
| EV7 | 21364 Alpha 21364 The Alpha 21364, code-named "Marvel", also known as EV7 is a microprocessor developed by Digital Equipment Corporation , later Compaq Computer Corporation, that implemented the Alpha instruction set architecture .- History :... |
2003 | 1000–1150 | 0.18 | 130 | 397 | 125 | 1.5 | 64 | 64 | 1.75 MB | – | R,B,M,F,C,T | ||
| EV7z | 21364 | 2004 | 1300 | 0.18 | 130 | 397 | 125 | 1.5 | 64 | 64 | 1.75 MB | – | R,B,M,F,C,T | ||
| Cancelled | |||||||||||||||
| EV78/EV79 | 21364A | Slated for 2004 | 1700 | 0.13 | 152 | 300 | 120 | 1.2 | 64 | 64 | 1.75 MB | – | R,B,M,F,C,T | ||
| EV8 | 21464 Alpha 21464 The Alpha 21464 is an unfinished microprocessor that implements the Alpha instruction set architecture developed by Digital Equipment Corporation and later by Compaq after it acquired Digital. The microprocessor was also known as EV8 or Araña, the latter being its code-name... |
Slated for 2003 | 1200–2000 | 0.125 | 250 | 420 | 1800 | ?? | 1.2 | 64 | 64 | 3 MB | – | R,B,M,F,C,T | |
| Model | Model number | Year | Frequency [MHz] | Process [µm] | Transistors [millions] | Die size [mm²] | IO Pins | Power [W] | Voltage | Dcache [KB] | Icache [KB] | Scache | Bcache | ISA | |
ISA extensions:
- R – Hardware support for rounding to infinity and negative infinity.
- B – BWX, the "Byte/Word Extension", adding instructions to allow 8- and 16-bit operations from memory and I/O
- M – MVI, "multimedia" instructions
- F – FIX, instructions to move data between integer and floating point registers and for square root
- C – CIX, instructions for counting and finding bits
- T – Support for prefetch with modify intent to improve the performance of the first attempt to acquire a lock
Performance
To illustrate the comparative performance of Alpha-based systems, some SPECStandard Performance Evaluation Corporation
The Standard Performance Evaluation Corporation is a non-profit organization that aims to "produce, establish, maintain and endorse a standardized set" of performance benchmarks for computers....
performance numbers (SPECint95, SPECfp95) are listed below. Note that the SPEC results claim to report the measured performance of a whole computer system (CPU, bus, memory, compiler optimizer), not just the CPU. Also note that the benchmark and scale changed from 1992 to 1995. However, the figures give a rough impression of the performance of the Alpha architecture (64-bit), compared with the contemporary HP (64-bit) and Intel-based offerings (32-bit). Perhaps the most obvious trend is that while Intel could always get reasonably close to Alpha in integer performance, in floating point performance the difference was considerable. On the other side, HP (PA-RISC
PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture...
) is also reasonably close to Alpha, but these CPUs are running at significantly lower clock rates (MHz).
| System | CPU | MHz | integer | floating point |
|---|---|---|---|---|
| AlphaServer 8400 5/350 | 21164 (EV5) | 350 | 10.1 | 14.2 |
| Intel Alder System (200 MHz, 256KB L2) | Pentium Pro | 200 | 8.9 | 6.75 |
| HP 9000 C160 | PA 8000 | 160 | 10.4 | 16.3 |
| System | CPU | MHz | integer | floating point |
|---|---|---|---|---|
| AlphaServer ES40 6/833 | 21264 (EV6) | 833 | 50.0 | 100.0 |
| Intel VC820 motherboard | Pentium III | 1000 | 46.8 | 31.9 |
| HP 9000 C3600 | PA-8600 | 552 | 42.1 | 64.0 |
Alpha-based systems
The first generation of DEC Alpha-based systems comprised the DEC 3000 AXPDEC 3000 AXP
DEC 3000 AXP was the name given to a series of computer workstations and servers, produced from 1992 to around 1995 by Digital Equipment Corporation. The DEC 3000 AXP series formed part of the first generation of computer systems based on the 64-bit Alpha AXP architecture...
series workstations and low-end servers, DEC 4000 AXP
DEC 4000 AXP
The DEC 4000 AXP is a series of departmental server computers developed and manufactured by Digital Equipment Corporation introduced on 10 November 1992...
series mid-range servers, and DEC 7000 AXP and 10000 AXP
DEC 7000/10000 AXP
The DEC 7000 AXP and DEC 10000 AXP are a series of high-end multiprocessor server computers developed and manufactured by Digital Equipment Corporation, introduced on 10 November 1992...
series high-end servers. The DEC 3000 AXP systems used the same TURBOchannel
TURBOchannel
TURBOchannel is an open computer bus developed by DEC by during the late 1980s and early 1990s. Although it was open for any vendor to implement in their own systems, it was mostly used in Digital's own systems such as the MIPS-based DECstation and DECsystem systems, in the VAXstation 4000, and in...
bus as the previous MIPS
MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, and later versions were 64-bit...
-based DECstation models, whereas the 4000 was based on FutureBus+
Futurebus
Futurebus is a computer bus standard, intended to replace all local bus connections in a computer, including the CPU, memory, plug-in cards and even, to some extent, LAN links between machines. The effort started in 1979 and didn't complete until 1987, and then immediately went into a redesign...
and the 7000/10000 shared an architecture with corresponding VAX
VAX
VAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
models.
DEC also produced a PC
Personal computer
A personal computer is any general-purpose computer whose size, capabilities, and original sales price make it useful for individuals, and which is intended to be operated directly by an end-user with no intervening computer operator...
-like Alpha workstation with an EISA
Extended Industry Standard Architecture
The Extended Industry Standard Architecture is a bus standard for IBM PC compatible computers...
bus, the DECpc AXP 150 (codename "Jensen", also known as the DEC 2000 AXP). This was the first Alpha system to support Windows NT
Windows NT
Windows NT is a family of operating systems produced by Microsoft, the first version of which was released in July 1993. It was a powerful high-level-language-based, processor-independent, multiprocessing, multiuser operating system with features comparable to Unix. It was intended to complement...
. DEC later produced Alpha versions of their Celebris XL and Digital Personal Workstation
Digital Personal Workstation
The Digital Personal Workstation is a family of entry-level to mid-range workstation computers developed and manufactured by Digital Equipment Corporation . These workstations are based on the DEC Alpha and Intel Pentium Pro or Pentium II microprocessors...
PC lines, with 21164 processors.
Digital also produced single board computers based on the VMEbus
VMEbus
VMEbus is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors , but uses its own signalling system,...
for embedded and industrial use. The first generation included the 21068-based AXPvme 64 and AXPvme 64LC, and the 21066-based AXPvme 160. These were introduced on March 1, 1994. Later models such as the AXPvme 100, AXPvme 166 and AXPvme 230 were based on the 21066A processor, while the Alpha VME 4/224 and Alpha VME 4/288 were based on the 21064A processor. The last models, the Alpha VME 5/352 and Alpha VME 5/480, were based on the 21164 processor.
The 21066 chip was used in the DEC Multia
DEC Multia
The Multia, later re-branded the Universal Desktop Box, was a line of desktop computers introduced by Digital Equipment Corporation on 7 November 1994. The line is notable in that units were offered with either an Alpha AXP or Intel Pentium processor as the CPU, and most hardware other than the...
VX40/41/42 compact workstation and the ALPHAbook 1 laptop from Tadpole Technology.
In 1994, DEC launched a new range of AlphaStation
AlphaStation
AlphaStation was the name given to a series of computer workstations, produced from 1994 onwards by Digital Equipment Corporation, and latterly by Compaq and HP. As the name suggests, the AlphaStations were based on the DEC Alpha 64-bit microprocessor...
and AlphaServer
AlphaServer
AlphaServer was the name given to a series of server computers, produced from 1994 onwards by Digital Equipment Corporation, and latterly by Compaq and HP. As the name suggests, the AlphaServers were based on the DEC Alpha 64-bit microprocessor...
systems. These used 21064 or 21164 processors and introduced the PCI
Peripheral Component Interconnect
Conventional PCI is a computer bus for attaching hardware devices in a computer...
bus, VGA-compatible frame buffers and PS/2
PS/2 connector
The PS/2 connector is a 6-pin Mini-DIN connector used for connecting some keyboards and mice to a PC compatible computer system. Its name comes from the IBM Personal System/2 series of personal computers, with which it was introduced in 1987...
-style keyboards and mice. The AlphaServer 8000 series superseded the DEC 7000/10000 AXP and also employed XMI and FutureBus+ buses.
The AlphaStation XP1000 was the first workstation based on the 21264 processor. Later AlphaServer/Station models based on the 21264 were categorised into DS (departmental server), ES (enterprise server) or GS (global server) families.
The final 21364 chip was used in the AlphaServer ES47, ES80 and GS1280 models and the AlphaStation ES47.
A number of OEM
Original Equipment Manufacturer
An original equipment manufacturer, or OEM, manufactures products or components that are purchased by a company and retailed under that purchasing company's brand name. OEM refers to the company that originally manufactured the product. When referring to automotive parts, OEM designates a...
motherboard
Motherboard
In personal computers, a motherboard is the central printed circuit board in many modern computers and holds many of the crucial components of the system, providing connectors for other peripherals. The motherboard is sometimes alternatively known as the mainboard, system board, or, on Apple...
s were produced by DEC, such as the 21066 and 21068-based AXPpci 33 "NoName", which was part of a major push into the OEM market by the company, the 21164-based AlphaPC 164 and AlphaPC 164LX, the 21164PC-based AlphaPC 164SX and AlphaPC 164RX and the 21264-based AlphaPC 264DP. Several third-parties such as Samsung and API also produced OEM motherboards such as the API UP1000 and UP2000.
To assist third parties in developing hardware and software for the platform, DEC produced Evaluation Boards, such as the EB64+ and EB164 for the Alpha 21064A and 21164 microprocessors respectively.
The 21164 and 21264 processors were used by NetApp in various Network Attached Storage systems, while the 21064 and 21164 processors were used by Cray
Cray
Cray Inc. is an American supercomputer manufacturer based in Seattle, Washington. The company's predecessor, Cray Research, Inc. , was founded in 1972 by computer designer Seymour Cray. Seymour Cray went on to form the spin-off Cray Computer Corporation , in 1989, which went bankrupt in 1995,...
in their T3D
Cray T3D
The T3D was Cray Research's first attempt at a massively parallel supercomputer architecture. Launched in 1993, it also marked Cray's first use of another company's microprocessor. The T3D consisted of between 32 and 2048 Processing Elements , each comprising a 150 MHz DEC Alpha 21064 ...
and T3E
Cray T3E
The Cray T3E was Cray Research's second-generation massively parallel supercomputer architecture, launched in late November 1995. The first T3E was installed at the Pittsburgh Supercomputing Center in 1996. Like the previous Cray T3D, it was a fully distributed memory machine using a 3D torus...
massively parallel
Massively parallel
Massively parallel is a description which appears in computer science, life sciences, medical diagnostics, and other fields.A massively parallel computer is a distributed memory computer system which consists of many individual nodes, each of which is essentially an independent computer in itself,...
supercomputers.
Supercomputers
The fastest supercomputers based on Alpha processors:- ASCI QASCI QThe ASCI Q was a supercomputer at the Los Alamos National Laboratory, installed in 2003. It was a DEC AlphaServer SC45/GS Cluster and reached 7.727 Teraflops....
at Los Alamos National Laboratory. Machine: HP AlphaServer SC45/GS Cluster. CPU: 4096 Alpha (21264 EV-68, 1.25 GHz). Rmax: 7.727 Teraflops.
External links
- The Alpha Architecture Handbook, Version 4
- The Alpha Architecture Handbook, Version 3
- Digital Technical Journal, Volume 4, Number 4, Special Issue 1992 Alpha AXP Architecture and Systems This issue contains several articles from Alpha's Architects
- Archived technical documentation library This link features the hardware reference manuals and datasheets for Alpha microprocessors, chipsets and OEM motherboards. Includes the Alpha Architecture Handbook and various programming manuals.