NORD-100
Encyclopedia
The NORD-100 was a 16-bit minicomputer series made by Norsk Data
, introduced in 1979. It shipped with the SINTRAN
operating system, and the architecture was based on, and backwards compatible with, the NORD-10
line.
The NORD-100 was originally named the NORD-10/M (M for Micro) as a bitsliced OEM processor. The board was laid out and finished and tested when they realized that the CPU was far faster than the NORD-10/S. The result was that all the marketing material for the new NORD-10/M was discarded, the board was rechristened the NORD-100, and extensively advertised as the successor of the NORD-10 line. Later, in an effort to internationalize their line, the machine was renamed ND-100.
line, the CPU decided the name of the computer.
The ND-100 line was machine-instruction compatible with the Nord-10 line, except for some "extended instructions", all in supervisor mode, mostly used by the operating system. Like most processors of its time, the native bit grouping was octal
, despite the 16-bit word length.
The ND-100 series had a microcoded central processing unit, with downloadable microcode, and was considered a CISC
processor.
The ND-100 was frequently sold together with a memory management card
, the MMS. The combined power use of these boards was 90 watts. These boards would usually occupy slots 2 and 3, for the CPU and MMS, respectively. Slot 1 was reserved for the Tracer, a hardware debugger system.
It added instruction for decimal arithmetic and conversion, stack instructions, segment-change instructions used by the OS, a block move, test-and-set, and a read-without-cache instruction.
The ND-110 combined the Memory Management System and CPU, previously separate cards, on one board. The single CPU/MMS board was plugged into the memory management board slot, usually numbered 3. The power consumption was reduced from 90 watts to 60.
The ND-110 made extensive use of PAL
s and gate array
s - with "semi-custom" VLSI chips.
The ND-110 had three gate arrays:
In addition to the macro-instruction cache memory also found in the ND-100, the ND-110 had a unique implementation of cache memory on the micro-instruction level. The step known as mapping in the ND-100 was then avoided because the first micro-instruction word of a macro-instruction was written into the control store cache.
Unlike the ND-100 CPU, it handled synchronous interrupts as traps, similar to how it was handled by the ND-500.
The control store
consisted of 4K x 4 bit 40ns SRAM
chips. This meant that the control store was writable. It was loaded at power up and Master Clear from two 32Kx8 bit EPROM
s.
The CPU clock and the bus arbitration network were implemented using 15ns PALs.
The main oscillator was a 39.3216 MHz crystal oscillator.
. The added instructions were the same as the /CE.
chip), and was originally intended to be sold as the ND-1000, to reflect the technology change, which paralleled the change from the ND-500
series to the ND-5000 (Codenamed Samson
).
The Samson/Delilah naming scheme may reflect that around the time of the development of the ND-120, it was increasingly clear that the mixed 16/32-bit architecture was a bottleneck for the ND-500(0) architecture; Internal technical documentation used at Norsk Data for the Delilah chip has a drawing of a grinning woman with hair in her clenched fist.
Norsk Data
Norsk Data was a computer manufacturer located in Oslo, Norway. Existing from 1967 to 1992, it had its most active period in the years from the early 1970s to the late 1980s...
, introduced in 1979. It shipped with the SINTRAN
SINTRAN
SINTRAN is the name of a range of operating systems for Norsk Data's line of minicomputers. The original version of SINTRAN, released in 1968, was developed by the Department of Engineering Cybernetics at the Norwegian Institute of Technology in cooperation with the affiliated research institute,...
operating system, and the architecture was based on, and backwards compatible with, the NORD-10
NORD-10
NORD-10 was a medium-sized general-purpose 16-bit minicomputer designed for multilingual time-sharing applications and for real-time multiprogram systems, produced by Norsk Data. It was introduced in 1973...
line.
The NORD-100 was originally named the NORD-10/M (M for Micro) as a bitsliced OEM processor. The board was laid out and finished and tested when they realized that the CPU was far faster than the NORD-10/S. The result was that all the marketing material for the new NORD-10/M was discarded, the board was rechristened the NORD-100, and extensively advertised as the successor of the NORD-10 line. Later, in an effort to internationalize their line, the machine was renamed ND-100.
Performance
| ND-100 | ND-100/CE | ND-110 | ND-110/CX | ND-120/CX | ND-125/CX |
|---|---|---|---|---|
| Minimum number of microinstructions per instruction | 3 | 3 | 1 | 1 |
| Minimum microinstruction cycle time | 150ns | 150ns | 100ns | 100ns |
| Whetstone Whetstone (benchmark) The Whetstone benchmark is a synthetic benchmark for evaluating the performance of computers. It was first written in Algol 60 in 1972 at the National Physical Laboratory in the United Kingdom and derived from statistics on program behaviour gathered on the KDF9 computer, using a modified version... MWIPS |
0.5 | 0.5 | 0.3 | 0.3 |
CPU
The ND-100 line used a custom processor, and like the PDP-11PDP-11
The PDP-11 was a series of 16-bit minicomputers sold by Digital Equipment Corporation from 1970 into the 1990s, one of a succession of products in the PDP series. The PDP-11 replaced the PDP-8 in many real-time applications, although both product lines lived in parallel for more than 10 years...
line, the CPU decided the name of the computer.
- NORD-100/CE, Commercial Extended, with decimal arithmetic instructions (The decimal instruction set was later renamed CX)
- ND-110, incrementally improved ND-100
- ND-110/CX, an ND-110 with the decimal instructions.
- ND-120/CX, completely redesigned.
The ND-100 line was machine-instruction compatible with the Nord-10 line, except for some "extended instructions", all in supervisor mode, mostly used by the operating system. Like most processors of its time, the native bit grouping was octal
Octal
The octal numeral system, or oct for short, is the base-8 number system, and uses the digits 0 to 7. Numerals can be made from binary numerals by grouping consecutive binary digits into groups of three...
, despite the 16-bit word length.
The ND-100 series had a microcoded central processing unit, with downloadable microcode, and was considered a CISC
Complex instruction set computer
A complex instruction set computer , is a computer where single instructions can execute several low-level operations and/or are capable of multi-step operations or addressing modes within single instructions...
processor.
ND-100
The ND-100 was implemented using medium-scale integration (MSI) logic and bit-slice processors.The ND-100 was frequently sold together with a memory management card
Memory management unit
A memory management unit , sometimes called paged memory management unit , is a computer hardware component responsible for handling accesses to memory requested by the CPU...
, the MMS. The combined power use of these boards was 90 watts. These boards would usually occupy slots 2 and 3, for the CPU and MMS, respectively. Slot 1 was reserved for the Tracer, a hardware debugger system.
ND-100/CE
The CE stood for Commercial Extended. The processor was upgraded by replacing the microcode PROM.It added instruction for decimal arithmetic and conversion, stack instructions, segment-change instructions used by the OS, a block move, test-and-set, and a read-without-cache instruction.
ND-110
The ND-110 was an incremental improvement over the ND-100.The ND-110 combined the Memory Management System and CPU, previously separate cards, on one board. The single CPU/MMS board was plugged into the memory management board slot, usually numbered 3. The power consumption was reduced from 90 watts to 60.
The ND-110 made extensive use of PAL
Programmable Array Logic
The term Programmable Array Logic is used to describe a family of programmable logic device semiconductors used to implement logic functions in digital circuits introduced by Monolithic Memories, Inc. in March 1978. MMI obtained a registered trademark on the term PAL for use in "Programmable...
s and gate array
Gate array
A gate array or uncommitted logic array is an approach to the design and manufacture of application-specific integrated circuits...
s - with "semi-custom" VLSI chips.
The ND-110 had three gate arrays:
- The Micro Instruction Controller, the MIC - also known as RMIC, for "Rask MIC" ("Speedy MIC"). It replaced three 74S482 sequencers and about 30 other ICs.
- The Arithmetical and Logical Unit gate array (ALUArithmetic logic unitIn computing, an arithmetic logic unit is a digital circuit that performs arithmetic and logical operations.The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers...
, also known as the "BUFALU"). Replaced four Am2901AMD Am2900Am2900 is a family of integrated circuits created in 1975 by Advanced Micro Devices . They were constructed with bipolar devices, in a bit-slice topology, and were designed to be used as modular components each representing a different aspect of a computer control unit...
bit-slice processors, and some additional registers like the data bus register the general purpose register, and the internal register block. - The Micro Address Controller (The MAC, also called RMAC, for "Rask MAC" ("Speedy MAC"). It implemented hardware address arithmetic, which in the ND-100 had been done in microcode.
In addition to the macro-instruction cache memory also found in the ND-100, the ND-110 had a unique implementation of cache memory on the micro-instruction level. The step known as mapping in the ND-100 was then avoided because the first micro-instruction word of a macro-instruction was written into the control store cache.
Unlike the ND-100 CPU, it handled synchronous interrupts as traps, similar to how it was handled by the ND-500.
The control store
Control store
A control store is the part of a CPU's control unit that stores the CPU's microprogram. It is usually accessed by a microsequencer. Early control stores were implemented as a diode-array accessed via address decoders, a form of read-only memory. This tradition dates back to the program timing...
consisted of 4K x 4 bit 40ns SRAM
Static random access memory
Static random-access memory is a type of semiconductor memory where the word static indicates that, unlike dynamic RAM , it does not need to be periodically refreshed, as SRAM uses bistable latching circuitry to store each bit...
chips. This meant that the control store was writable. It was loaded at power up and Master Clear from two 32Kx8 bit EPROM
EPROM
An EPROM , or erasable programmable read only memory, is a type of memory chip that retains its data when its power supply is switched off. In other words, it is non-volatile. It is an array of floating-gate transistors individually programmed by an electronic device that supplies higher voltages...
s.
The CPU clock and the bus arbitration network were implemented using 15ns PALs.
The main oscillator was a 39.3216 MHz crystal oscillator.
ND-110/CX
This was the ND-110 with the CX microcode PROMProgrammable read-only memory
A programmable read-only memory or field programmable read-only memory or one-time programmable non-volatile memory is a form of digital memory where the setting of each bit is locked by a fuse or antifuse. Such PROMs are used to store programs permanently...
. The added instructions were the same as the /CE.
ND-120/CX
The ND-120 CPU was a complete reimplementation on an LSI chip (The so-called DelilahDelilah
Delilah appears only in the Hebrew bible Book of Judges 16, where she is the "woman in the valley of Sorek" whom Samson loved, and who was his downfall...
chip), and was originally intended to be sold as the ND-1000, to reflect the technology change, which paralleled the change from the ND-500
ND-500
The ND-500 was a 32-bit superminicomputer delivered in 1981 by Norsk Data. It relied on a ND-100 to do housekeeping tasks and run the OS, SINTRAN III.A configuration could feature up to four ND-500 CPUs, in a shared-memory configuration....
series to the ND-5000 (Codenamed Samson
Samson
Samson, Shimshon ; Shamshoun or Sampson is the third to last of the Judges of the ancient Israelites mentioned in the Tanakh ....
).
The Samson/Delilah naming scheme may reflect that around the time of the development of the ND-120, it was increasingly clear that the mixed 16/32-bit architecture was a bottleneck for the ND-500(0) architecture; Internal technical documentation used at Norsk Data for the Delilah chip has a drawing of a grinning woman with hair in her clenched fist.