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VAX 6000
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The VAX 6000 is a family of minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA). Originally, the VAX 6000 was intended to be a mid-range VAX product line complimenting the VAX 8000, but with the introduction of the VAX 6000 Model 400 series, the older VAX 8000 was discontinued in favor of the VAX 6000, which offered slightly higher performance for half the cost.

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Encyclopedia
The VAX 6000 is a family of minicomputers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA). Originally, the VAX 6000 was intended to be a mid-range VAX product line complimenting the VAX 8000, but with the introduction of the VAX 6000 Model 400 series, the older VAX 8000 was discontinued in favor of the VAX 6000, which offered slightly higher performance for half the cost.
VAX 6000 Model 2x0
- (Previously known as the VAX 62x0)
- Code named "Calypso"
- Introduced in 19 April 1988
- One to four 12.5 MHz (80 ns cycle time) CVAX chip set(s), each with an external 256 KB of secondary cache built from 160 ns SRAM
- (The number of chip sets present determines the value of "x").
- Maximum of 256 MB of ECC memory
VAX 6000 Model 3x0
- (Previously known as the VAX 63x0)
- Code named "Hyperion"
- Introduced on 24 January 1989
- One to six KA62B CPU modules, each containing a 16.67 MHz (60 ns cycle time) CVAX+ chip set with 256 KB of external secondary cache clocked at 8.33 MHz (120 ns cycle time)
- (The number of CPU modules present determines the value of "x").
- Maximum of 256 MB of ECC memory
VAX 6333 The VAX 6333 is a prepackaged VAXcluster of three VAX 6330 (VAX 6000 Model 330) systems. Bundled with the SA650 Storage Array, the VAX 6333 costs US$2.8 million.
VAX 6000 Model 4x0
- Code named "Calypso/XRP"
- Introduced on 11 July 1989
- One to six KA64A CPU modules, each containing a 35.71 MHz (28 ns cycle time) Rigel chip set with 128 KB of external secondary cache
- (The number of CPU modules present determines the value of "x").
- Maximum of 256 MB of ECC memory
VAX 6000 Model 5x0
- Code named "Calypso/XMP"
- Introduced on 25 October 1990
- One to six KA65A CPU modules, each containing a 62.5 MHz (16 ns cycle time) Mariah chip set with 512 KB of external secondary cache
- (The number of CPU modules present determines the value of "x").
- Maximum of 512 MB of ECC memory
VAX 6000 Model 6x0
- Code named "Neptune"
- Introduced on 30 November 1991
- One to six KA66A CPU modules, each containing a 83.33 MHz (12 ns cycle time) NVAX microprocessor with 2 MB of external secondary cache
- (The number of CPU modules present determines the value of "x").
- Maximum of 1 GB of memory
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