Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and
CPU socketA CPU socket or CPU slot is an electrical component that attaches to a printed circuit board and is designed to house a CPU . It is a special type of integrated circuit socket designed for very high pin counts...
formats. The Sempron replaced the AMD
DuronThe AMD Duron was an x86-compatible computer processor manufactured by AMD. It was released on June 19, 2000 as a low-cost alternative to AMD's own Athlon processor and the Pentium III and Celeron processor lines from rival Intel...
processor and competes against Intel's Celeron series of processors. AMD coined the name from the Latin
semper, which means "always", to suggest the Sempron is suitable for "daily use, practical, and part of everyday life".
The first Sempron CPUs were based on the Athlon XP architecture using the
Thoroughbred or
Thorton core.
Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and
CPU socketA CPU socket or CPU slot is an electrical component that attaches to a printed circuit board and is designed to house a CPU . It is a special type of integrated circuit socket designed for very high pin counts...
formats. The Sempron replaced the AMD
DuronThe AMD Duron was an x86-compatible computer processor manufactured by AMD. It was released on June 19, 2000 as a low-cost alternative to AMD's own Athlon processor and the Pentium III and Celeron processor lines from rival Intel...
processor and competes against Intel's Celeron series of processors. AMD coined the name from the Latin
semper, which means "always", to suggest the Sempron is suitable for "daily use, practical, and part of everyday life".
History and features
The first Sempron CPUs were based on the Athlon XP architecture using the
Thoroughbred or
Thorton core. These models were equipped with the
Socket ASocket A is the CPU socket used for AMD processors ranging from the Athlon Thunderbird to the Athlon XP/MP 3200+, and AMD budget processors including the Duron and Sempron. Socket A also supports the recent AMD Geode NX embedded processors...
interface, 256 KiB L2 cache and 166 MHz
Front side busIn personal computers, the front side bus is the bus that carries data between the CPU and the northbridge.Depending on the processor used, some computers may also have a back-side bus that connects the CPU to the cache...
(FSB 333). Thoroughbred cores natively had 256 KiB L2 cache, but Thortons had 512 KiB L2 cache, half of which was disabled and could sometimes be reactivated with a slight physical modification to the chip. Later, AMD introduced the Sempron 3000+ CPU, based on the
Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially identical to Athlon XP desktop CPUs with a new brand name. AMD has ceased production of all Socket A Sempron CPUs.
The second generation (
Paris/
Palermo core) was based on the architecture of the
Socket 754Socket 754 is a CPU socket originally developed by AMD to succeed its Athlon XP platform . Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit microprocessor family known as AMD64.-Technical Specifications:Socket 754 was the original socket for...
Athlon 64The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP...
. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die)
memory controllerThe memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor....
, the
HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
link, and AMD's "
NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
" feature.
In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a
niche marketA niche market is the subset of the market on which a specific product is focusing on; Therefore the market niche defines the specific product features aimed at satisfying specific market needs, as well as the price range, production quality and the demographics that is intended to impact.Every...
.
In 2006, AMD announced the
Socket AM2The Socket AM2, renamed from Socket M2 , is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments...
and
Socket S1Socket S1 is the CPU socket type used by AMD for their Turion 64, Athlon 64 Mobile and later Sempron processors, which debuted with the dual core Turion 64 X2 CPUs on May 17, 2006.-Technical specifications:...
line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel
DDR2 SDRAMDDR2 SDRAM is a double data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not compatible...
memory controller which replaces the single-channel
DDR SDRAMDouble data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. It achieves nearly twice the bandwidth of the preceding single data rate SDRAM by double pumping without increasing the clock frequency.With data being transferred 64 bits at...
version. The
TDPThe thermal design power , sometimes called thermal design point, represents the maximum amount of power the cooling system in a computer is required to dissipate. For example, a laptop's CPU cooling system may be designed for a 20 watt TDP, which means that it can dissipate up to 20 watts of heat...
of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. In 2006, AMD was selling both Socket 754 and Socket AM2 Sempron CPUs concurrently. In the middle of 2007 AMD appears to have dropped the 754 line and is shipping AM2 and S1 Semprons.
| AMD Sempron processor family |
| Logo |
DesktopA desktop computer is a personal computer in a form intended for regular use at a single location, as opposed to a mobile laptop or portable computer. Prior to the wide spread of microprocessors, a computer that could fit on a desk was considered remarkably small...
|
Logo |
Laptop A laptop is a personal computer designed for mobile use and small and light enough to sit on one's lap while in use. A laptop integrates most of the typical components of a desktop computer, including a display, a keyboard, a pointing device , speakers, and often including a battery, into a single...
|
| Code-named |
Core |
Date released |
Code-named |
Core |
Date released |
|
Thoroughbred
Thorton
Barton
Paris
Palermo
Manila |
130 nm
130 nm
130 nm
130 nm
90 nm
90 nm |
Jul 2004
Aug 2004
Sep 2004
Jul 2004
Aug 2004
May 2006 |
|
Dublin
Georgetown
Sonora
Albany
Roma
Keene |
130 nm
130 nm
90 nm
90 nm
90 nm
90 nm |
Jul 2004
May 2005
Nov 2004
Jul 2005
Jul 2005
May 2006 |
|
Sparta
Brisbane
Sargas |
65 nm
65 nm
45 nm |
Aug 2007
Mar 2008
July 2009 |
|
Sherman
Sable
Huron |
65 nm
65 nm
65 nm
|
May 2007
Jun 2008
Jan 2009 |
| List of AMD Sempron microprocessors |
Thoroughbred B/Thorton (130 nm)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 KiB, fullspeed
- MMX, 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
- Socket A
Socket A is the CPU socket used for AMD processors ranging from the Athlon Thunderbird to the Athlon XP/MP 3200+, and AMD budget processors including the Duron and Sempron. Socket A also supports the recent AMD Geode NX embedded processors...
(EV6)
- Front side bus
In personal computers, the front side bus is the bus that carries data between the CPU and the northbridge.Depending on the processor used, some computers may also have a back-side bus that connects the CPU to the cache...
: 166 MHz (FSB 333)
- VCore: 1.6 V
- First release: July 28, 2004
- Clockrate: 1500 MHz – 2000 MHz (2200+ to 2800+)
Barton (130 nm)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 512 KiB, fullspeed
- MMX, 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
- Socket A
Socket A is the CPU socket used for AMD processors ranging from the Athlon Thunderbird to the Athlon XP/MP 3200+, and AMD budget processors including the Duron and Sempron. Socket A also supports the recent AMD Geode NX embedded processors...
(EV6)
- Front side bus
In personal computers, the front side bus is the bus that carries data between the CPU and the northbridge.Depending on the processor used, some computers may also have a back-side bus that connects the CPU to the cache...
: 166 MHz – 200 MHz (FSB 333 – 400)
- VCore: 1.6 – 1.65 V
- First release: September 17, 2004
- Clockrate: 2000–2200 MHz (Sempron 3000+, Sempron 3300+)
Paris (130 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 KiB, fullspeed
- MMX, 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
- Enhanced Virus Protection (NX bit
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
)
- Integrated 72-bit (Single channel, ECC capable) DDR memory controller
- Socket 754
Socket 754 is a CPU socket originally developed by AMD to succeed its Athlon XP platform . Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit microprocessor family known as AMD64.-Technical Specifications:Socket 754 was the original socket for...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 1.4 V
- First release: July 28, 2004
- Clockrate: 1800 MHz (3100+)
- Stepping: CG (Part No.: *AX)
Palermo (90 nm SOI)
- Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
- SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
support on E3 and E6 steppings
- AMD64 on E6 stepping
- Cool'n'Quiet
Cool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
(Sempron 3000+ and higher)
- Enhanced Virus Protection (NX bit
The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
)
- Integrated 72-bit (Single channel, ECC capable) DDR memory controller
- Socket 754
Socket 754 is a CPU socket originally developed by AMD to succeed its Athlon XP platform . Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit microprocessor family known as AMD64.-Technical Specifications:Socket 754 was the original socket for...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 1.4 V
- First release: February 2005
- Clockrate: 1400–2000 MHz
- 128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
- 256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
- Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)
Palermo (90 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
, AMD64 (E6 Steppings Only), Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
, NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
- Integrated 144-bit (Dual channel, ECC capable) DDR memory controller
- Socket 939
Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors.-Availability:...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 1.35/1.4 V
- First release: October 2005
- Clockrate: 1800–2000 MHz
- 128 KiB L2-Cache (Sempron 3000+, 3400+)
- 256 KiB L2-Cache (Sempron 3200+, 3500+)
- Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)
Manila (90 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 128/256 KiB, fullspeed
- MMX, Extended 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
, AMD64, Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
, NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
- Integrated 128-bit (Dual channel) DDR2
DDR2 SDRAM is a double data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not compatible...
memory controller
- Socket AM2
The Socket AM2, renamed from Socket M2 , is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
- First release: May 23, 2006
- Clockrate: 1600–2200 MHz
- 128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
- 256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+, 3800+)
- Stepping: F2 (Part No.: *CN, *CW)
Sparta (65 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256/512 KiB, fullspeed
- MMX, Extended 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
, AMD64, Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
, NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
- Integrated 128-bit (Dual channel) DDR2
DDR2 SDRAM is a double data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not compatible...
memory controller
- Socket AM2
The Socket AM2, renamed from Socket M2 , is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 1.20/1.40 V
- First release: August 20, 2007
- Clockrate: 1900–2300 MHz
- 256 KiB L2-Cache (Sempron LE-1100, LE-1150)
- 512 KiB L2-Cache (Sempron LE-1200, LE-1250, LE-1300)
- Stepping: G1 (Part No.: *DE), G2 (Part No.: *DP)
Sargas (45 nm SOI)
- Core Speed (MHz) - 2700
- Max Temps (C) 65
- Wattage 45 W
- L1 Cache Size (KB) 128
- L2 Cache Size (KB) 1024
- CPU Arch : 1 CPU - 1 Cores - 1 Threads
- CPU EXT : MMX(+) 3DNow!(+) SSE SSE2 SSE3 SSE4A x86-64
- CPUID : F.6.2 / Extended : 10.6
- Core : (45 nm) / Stepping : BL-C2
Keene (90 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 or 512 KiB, fullspeed
- MMX, Extended 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
, AMD64, Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
, NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
- Integrated 128-bit (Dual channel) DDR2
DDR2 SDRAM is a double data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not compatible...
memory controller
- Socket S1
Socket S1 is the CPU socket type used by AMD for their Turion 64, Athlon 64 Mobile and later Sempron processors, which debuted with the dual core Turion 64 X2 CPUs on May 17, 2006.-Technical specifications:...
, 800 MHz HyperTransportHyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: 0.950-1.25 V
- First release: May 17, 2006
- Clockrate: 1000–2000 MHz
- 256 KiB L2-Cache (Sempron 2100+, 3400+)
- 512 KiB L2-Cache (Sempron 3200+, 3500+, 3600+)
- Stepping: F2 (Part No.: *CM)
Huron (65 nm SOI)
- L1-Cache: 64 + 64 KiB (Data + Instructions)
- L2-Cache: 256 KiB, fullspeed
- MMX, Extended 3DNow!
3DNow! is an extension to the x86 instruction set developed by AMD. It adds SIMD instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow!...
, SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a...
, AMD64, Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
, NX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
- Integrated 128-bit (Dual channel) DDR2
DDR2 SDRAM is a double data rate synchronous dynamic random access memory interface. It supersedes the original DDR SDRAM specification and the two are not compatible...
memory controller
- ASB1 package, 800 MHz HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2 2001. The HyperTransport Consortium is in charge of promoting and developing HyperTransport technology...
- VCore: ?
- First release: January 8, 2009
- Clockrate: 1000–1500 MHz
- 256 KiB L2-Cache (Sempron 200U) 1000 MHz TDP 8 W
- 256 KiB L2-Cache (Sempron 210U) 1500 MHz TDP 15 W
- Stepping: ? (Part No.: *DV)
Socket 754 32-bit Semprons
| Max P-State |
Model |
Manufacturing Process |
Part Number(OPN) |
| 1600 MHz |
2600+ |
0.09 micrometre |
SDA2600AIO2BA(some parts are 64-bit) |
| 1600 MHz |
2800+ |
0.09 micrometre |
SDA2800AIO3BA |
| 1800 MHz |
3000+ |
0.13 micrometre |
SDA3000AIP2AX |
| 1800 MHz |
3100+ |
0.13 micrometre |
SDA3100AIP3AX |
| 1800 MHz |
3100+ |
0.09 micrometre |
SDA3100AIO3BA |
| 2000 MHz |
3300+ |
0.09 micrometre |
SDA3300AIO2BA |
Socket S1 (638) 64-bit Semprons
| Max P-State |
Model |
Manufacturing Process |
Part Number(OPN) |
| 1000 MHz |
800 |
0.09 micrometre |
TBA |
| 1600 MHz |
3200 |
0.09 micrometre |
SMS3200HAX4CM |
| 1800 MHz |
3400 |
0.09 micrometre |
SMS3400HAX3CM |
| 1800 MHz |
3500 |
0.09 micrometre |
SMS3500HAX4CM |
| 2000 MHz |
3600 |
0.09 micrometre |
SMS3600HAX3CM |
Semprons without Cool'n'QuietCool'n'Quiet is a CPU speed throttling and power saving technology introduced by AMD with their Athlon 64 processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this technology is to reduce overall power consumption and lower heat...
AMD has released some Sempron processors without Cool'n'Quiet support. The following table describes those processors lacking Cool'n'Quiet.
| Max P-State |
Min P-State |
Model |
Operating Mode |
Package-Socket |
Manufacturing Process |
Part Number(OPN) |
| 1400 MHz |
N/A |
2500+ |
32/64 |
Socket 754 |
0.09 micrometre |
SDA2500AIO3BX |
| 1600 MHz |
N/A |
2600+ |
32 or 32/64 |
Socket 754 |
0.09 micrometre |
SDA2600AIO2BA |
| 1600 MHz |
N/A |
2600+ |
32/64 |
Socket 754 |
0.09 micrometre |
SDA2600AIO2BX |
| 1600 MHz |
N/A |
2800+ |
32 |
Socket 754 |
0.09 micrometre |
SDA2800AIO3BA |
| 1600 MHz |
N/A |
2800+ |
32/64 |
Socket 754 |
0.09 micrometre |
SDA2800AIO3BX |
| 1600 MHz |
N/A |
2800+ |
32/64 |
Socket AM2 |
0.09 micrometre |
SDA2800IAA2CN |
| 1600 MHz |
N/A |
3000+ |
32/64 |
Socket AM2 |
0.09 micrometre |
SDA3000IAA3CN |
| 1600 MHz |
N/A |
3000+ |
32/64 |
Socket AM2 |
0.09 micrometre |
SDD3000IAA3CN |
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