SPI-4.2
Encyclopedia
SPI-4.2 is a version of the System Packet Interface
System Packet Interface
The System Packet Interface family of Interoperability Agreements from the Optical Internetworking Forum specify chip-to-chip, channelized, packet interfaces commonly used in synchronous optical networking and ethernet applications. A typical application of such a packet level interface is between...

 published by the Optical Internetworking Forum
Optical Internetworking Forum
The Optical Internetworking Forum is a non-profit, member-driven organization founded in 1998. It promotes the development and deployment of interoperable networking solutions and services through the creation of Implementation Agreements for optical networking products, network processing...

. It was designed to be used in systems that support OC-192 SONET
Sonet
Sonet may refer to:* Sonet Records, European record label* Synchronous optical networking * Saab Sonett...

 interfaces and is sometimes used in 10 Gigabit Ethernet
10 Gigabit Ethernet
The 10 gigabit Ethernet computer networking standard was first published in 2002. It defines a version of Ethernet with a nominal data rate of 10 Gbit/s , ten times faster than gigabit Ethernet.10 gigabit Ethernet defines only full duplex point to point links which are generally connected by...

 based systems.

SPI-4 is an interface for packet and cell transfer between a physical layer
Physical layer
The physical layer or layer 1 is the first and lowest layer in the seven-layer OSI model of computer networking. The implementation of this layer is often termed PHY....

 (PHY) device and a link layer
Link Layer
In computer networking, the link layer is the lowest layer in the Internet Protocol Suite , the networking architecture of the Internet . It is the group of methods or protocols that only operate on a host's link...

 device, for aggregate bandwidths of OC-192 Asynchronous Transfer Mode
Asynchronous Transfer Mode
Asynchronous Transfer Mode is a standard switching technique designed to unify telecommunication and computer networks. It uses asynchronous time-division multiplexing, and it encodes data into small, fixed-sized cells. This differs from approaches such as the Internet Protocol or Ethernet that...

(ATM) and Packet over SONET/SDH
Packet over SONET/SDH
Packet over SONET/SDH, abbreviated POS, is a communications protocol for transmitting packets in the form of the Point to Point Protocol over SDH or SONET, which are both standard protocols for communicating digital information using lasers or light emitting diodes over optical fibre at high...

 (POS), as well as 10 Gigabit Ethernet
10 Gigabit Ethernet
The 10 gigabit Ethernet computer networking standard was first published in 2002. It defines a version of Ethernet with a nominal data rate of 10 Gbit/s , ten times faster than gigabit Ethernet.10 gigabit Ethernet defines only full duplex point to point links which are generally connected by...

 applications.

SPI-4 has two types of transfers—Data when the RCTL signal is deasserted; Control when the RCTL signal is asserted. The transmit and receive data paths include, respectively, (TDCLK, TDAT[15:0],TCTL) and (RDCLK, RDAT[15:0], RCTL). The transmit and receive FIFO status channels include (TSCLK, TSTAT[1:0]) and (RSCLK, RSTAT[1:0]) respectively.

A typical application of SPI-4.2 is to connect a framer device to a network processor
Network processor
A network processor is an integrated circuit which has a feature set specifically targeted at the networking application domain.Network processors are typically software programmable devices and would have generic characteristics similar to general purpose central processing units that are commonly...

. It has been widely adopted by the high speed networking marketplace.

The interface consists of (per direction):
  • sixteen LVDS pairs for the data path
  • one LVDS pair for control
  • one LVDS pair for clock at half of the data rate
  • two FIFO
    FIFO
    FIFO is an acronym for First In, First Out, an abstraction related to ways of organizing and manipulation of data relative to time and prioritization...

     status lines running at 1/8 of the data rate
  • one status clock


The clocking is Source-synchronous
Source-synchronous
Source-Synchronous clocking refers to the technique of sourcing a clock along with the data. Specifically, the timing of unidirectional data signals is referenced to a clock sourced by the same device that generates those signals, and not to a global clock Source-Synchronous clocking refers to...

 and operates around 700 MHz. Implementations of SPI-4.2 have been produced which allow somewhat higher clock rates. This is important when overhead bytes are added to incoming packets.

PMC-Sierra
PMC-Sierra
PMC-Sierra is a fabless semiconductor company which develops and sells devices into the communications, storage, printing, and embedded computing marketplaces.-Corporate history:...

 made the original OIF contribution for SPI-4.2. That contribution was based on the PL-4
PL-4
PL-4 or POS-PHY Level 4 was the name of the interface that the interface SPI-4.2 is based on. It was proposed by PMC-Sierra to the Optical Internetworking Forum. The name means Packet Over SONET Physical layer level 4. PL-4 was developed by PMC-Sierra in conjunction with the Saturn Development...

 specification that was developed by PMC-Sierra in conjunction with the SATURN Development Group
SATURN Development Group
The SATURN Development Group was an important industry forum that enabled the specification of chip-to-chip interfaces for the communications industry. It was co-founded in 1992 by PMC-Sierra and Sun Microsystems. Several significant specifications were completed through its actions including...

.

The physical layer of SPI-4.2 is very similar to the HyperTransport
HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

1.x interface, although the logical layers are very different.

External links

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