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Pentium
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Introduced on March 22, 1993, the original Pentium was the first superscalar x86 microprocessor. Its fifth-generation x86 microarchitecture (sometimes called P5) was a direct extension of the 80486 architecture with dual integer pipelines, a faster FPU unit, wider data bus, and features for further reduced address calculation latency. In 1996, the Pentium MMX was introduced with the same basic microarchitecture complemented with MMX instructions, larger caches, and some other enhancements.
The name Pentium was derived from the Greek pente (p??te), meaning 'five', and the Latin ending -ium, a name selected after courts had disallowed trademarking of number-based names like "i586" or "80586".
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Encyclopedia
Introduced on March 22, 1993, the original Pentium was the first superscalar x86 microprocessor. Its fifth-generation x86 microarchitecture (sometimes called P5) was a direct extension of the 80486 architecture with dual integer pipelines, a faster FPU unit, wider data bus, and features for further reduced address calculation latency. In 1996, the Pentium MMX was introduced with the same basic microarchitecture complemented with MMX instructions, larger caches, and some other enhancements.
The name Pentium was derived from the Greek pente (p??te), meaning 'five', and the Latin ending -ium, a name selected after courts had disallowed trademarking of number-based names like "i586" or "80586". In 1995, Intel started to employ the registered Pentium trademark also for x86 processors with radically different microarchitectures (Pentium Pro / II / III / 4 / D / M). In 2006, the Pentium brand briefly disappeared from Intel's roadmaps, only to re-emerge in 2007.
Vinod Dham is often referred to as the father of the Intel Pentium processor, although many people, including John H. Crawford (of i386 and i486 alumni), were involved in the design and development of the processor.
Improvements over i486
* Superscalar architecture - The Pentium has two datapaths (pipelines) that allow it to complete more than one instruction per clock cycle. One pipe (called U) can handle any instruction, while the other (called V) can handle the simplest, most common instructions. Some RISC-proponents argued that the "complicated" x86 instruction set would probably never be implemented by a tightly pipelined microarchitecture, much less by a dual pipeline design. The 486 and the Pentium demonstrated that this was indeed possible and feasible.
- 64-bit external databus width - This doubles the amount of information read or written on each memory access. This doesn't mean that the Pentium can execute 64-bit applications; its main registers are still 32 bits wide.
- Faster floating point unit.
- MMX instructions (later models only) - A basic SIMD instruction set extension designed for use in multimedia applications.
Pentium architecture chips offered just under twice the performance of a 486 processor per clock cycle. The fastest Intel 486 parts were almost as powerful as a first-generation Pentium, and the AMD Am5x86 was roughly equal to the Pentium 75.
The Pentium ("Classic") series were designed to run at over 100 million instructions per second (MIPS), with the 75 MHz model running at 126.5 MIPS.
Models
The earliest Pentiums were released at the clock speeds of 60 MHz and 66 MHz. Later on 75, 90, 100, 120, 133, 150, 166, 200, and 233 MHz versions gradually became available. The 266 MHz and 300 MHz versions were later released for mobile computing. Pentium OverDrive processors were released at speeds of 63 and 83 MHz as an upgrade option for older 486-class computers. Pentium 60 MHz and 66 MHz chips contained 3.1 million transistors.
P5, P54C, P54CS
The original Pentium microprocessor had the internal code name P5 and the product code 80501 (80500 for the earliest steppings). This was a pipelined in-order superscalar microprocessor, produced using a 0.8 µm process. It was followed by the P54C (80502), built on a 0.6 µm process and employing an internal clock multiplier to let the internal circuitry work at a higher frequency than the external bus (as it is much more cumbersome to increase the bus frequency). It was also dual-processor ready. The P54C was followed by the P54CS, built on a 0.35 µm process.
Bugs and problems
The early versions of 60-100 MHz Pentiums had a problem in the floating point unit that resulted in incorrect (but predictable) results from some division operations. This bug, discovered in 1994 by professor Thomas Nicely at Lynchburg College, Virginia, became known as the Pentium FDIV bug and caused embarrassment for Intel, which created an exchange program to replace the faulty processors. Soon afterwards, a bug was discovered which could allow a malicious program to crash a system without any special privileges (the f00f bug); fortunately, operating systems were able to implement workarounds to prevent crashes.
The 60 and 66 MHz 0.8 µm versions of the Pentium processors also had (for the time) high heat production due to their 5V operation, and were often known colloquially as "coffee warmers" or some similar nickname. The P54C used 3.3V and had significantly lower power draw (a quadratic relationship). P5 Pentiums used Socket 4, while P54C started out on Socket 5 before moving to Socket 7 in later revisions. All desktop Pentiums from P54CS onwards used Socket 7.
Pentium Overdrive
The P24T Pentium OverDrive for 486-systems were released in 1995, which were based on 3.3V 0.6 µm versions using a 63 or 83 MHz clock. Since these used Socket 2/3, some adjustment had to be made to compensate for the 32-bit data bus and slower on-board L2 cache of 486-motherboards. They were therefore equipped with a 32KB L1 cache (double that of pre-P55C Pentiums). The product included an attached fan and heatsink assembly as well as power regulation to convert 5V down to 3.3V. Intel had promised 486 users an upgrade in the "near future" via an "Overdrive" socket to accommodate a Pentium-like CPU. However, the P24T arrived late, at low speeds, and high costs, which led some users to suspect that Intel never really planned such an upgrade, but eventually offered it to avoid a lawsuit. The P24Ts therefore sold poorly. In addition, motherboard compatibility with the P24T was poor, possibly due to the use of a write-back caching scheme. Common workarounds were to disable the motherboard's L2 cache causing a noticeable drop in system performance.
P55C, Tillamook
The P55C (or 80503) was developed by Intel's Research & Development Center in Haifa, Israel. It was sold as Pentium with MMX Technology (usually just called Pentium MMX); although it was based on the P5 core (the 0.35 µm process was also used for this series) it featured a new set of 57 "MMX" instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data. The Pentium MMX line was introduced on October 22, 1996.
The new instructions work on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. So, for example, the PADDUSB (Packed ADD Unsigned Saturated Byte) instruction adds two vectors, each containing eight 8-bit unsigned integers together, pairwise; each addition that would overflow saturates, yielding 255, the maximum unsigned value that can be represented in a byte. These rather specialized instructions generally require special coding by the programmer for them to be used. MMX did not achieve significant popularity until after the P55C's lifetime .
The performance of the P55C was improved over previous versions by a doubling of the Level 1 CPU cache from 16 KiB to 32 KiB.
Pentium P55C notebook CPUs used a "mobile module" that held the CPU. This module was a PCB with the CPU directly attached to it in a special smaller form factor. The module snapped to the notebook motherboard and typically a heat spreader plate was installed and made contact with the module. Such notebooks frequently used the Intel 430MX chipset, a feature-reduced 430FX. However, with the 0.25 µm Tillamook Mobile Pentium MMX (named after a city in Oregon), the module also held the 430TX chipset along with the system's 512 KiB SRAM cache memory.
As a trademark
Intel used the "Pentium" trademark in many brand names of x86 (instruction set) processors of later generations with different microarchitectures radically departed from the P5 found in CPUs originally branded as the "Pentium" only. They include:
Models and variants
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| Code name | P5 | P54C | P54CS | P55C | Tillamook |
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| Product code | 80500/ 80501 | 80502 | 80503 |
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| Process size (µm) | 0.80 | 0.60 or 0.35* | 0.35 | 0.35 (later 0.28) | 0.25 |
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| Package | CPGA | CPGA/TCP* | CPGA/PPGA/TCP* | CPGA/PPGA/TCP* | TCP/TCP on MMC-1 |
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| Clock speed (MHz) | 60 | 66 | 75 | 90 | 100 | 120 | 133 | 150 | 166 | 200 | 120* | 133* | 150* | 166 | 200 | 233 | 200 | 233 | 266 | 300 |
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| Bus speed (MHz) | 60 | 66 | 50 | 60 | 66 | 60 | 66 | 60 | 66 | 60 | 66 | 60 | 66 |
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| Voltage | 5.0 | 5.0 | 3.3 / 2,9* | 3.3 / 2.9* | 3.3 / 3.1* / 2.9* | 3.3 / 3.1* / 2.9* | 3.3 / 3.1* / 2.9* | 3.3 / 3.1* / 2.9* | 3.3 | 3.3 | 2.8 | 2.45 | 2.45 | 2.8 | 2.8 | 2.8 | 1.8 | 1.8 | 1.8 | 1.8 |
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| Introduced | 22 March 1993 | 10 October 1994 | 7 March 1994 | 27 March 1995 | June 1995 | 4 January 1996 | 10 June 1996 | 27 March 1995 - 1 November 1995 | 8 January 1997 | 2 June 1997 | August 1997 | January 1998 | January 1999 |
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* These were only available as Mobile Pentium or Mobile Pentium MMX chips for laptops.
Pentium MMX Overdrive | | | Code name | P54CTB |
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| Product code | PODPMT60X150 | PODPMT66X166 | PODPMT60X180 | PODPMT66X200 |
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| Process size (µm) | 0.35 |
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| Socket | Socket 5/7 |
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| Package | CPGA with heatsink, fan and voltage regulator |
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| Clock speed (MHz) | 125 | 150 | 166 | 150 | 180 | 200 |
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| Bus speed (MHz) | 50 | 60 | 66 | 50 | 60 | 66 |
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| Upgrade for | Pentium 75 | Pentium 90 | Pentium 100 and 133 | Pentium 75 | Pentium Pentium 90, 120 and 150 | Pentium 100, 133 and 166 |
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| TDP (max. W) | 15,6 | 15,6 | 15,6 | 18 |
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| Voltage | 3,3 | 3,3 | 3,3 | 3,3 |
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Embedded versions of Pentium MMX| Code name | P55C | Tillamook | | Product code | FV8050366200 | FV8050366233 | FV80503CSM66166 | GC80503CSM66166 | GC80503CS166EXT | FV80503CSM66266 | GC80503CSM66266 |
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| Process size (µm) | 0.35 | 0.25 |
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| Clock speed (MHz) | 200 | 233 | 166 | 166 | 166 | 266 | 266 |
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| Bus speed (MHz) | 66 | 66 | 66 | 66 | 66 | 66 | 66 |
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| Package | PPGA | PPGA | PPGA | BGA | BGA | PPGA | BGA |
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| TDP (max. W) | 15,7 | 17 | 4.5 | 4.1 | 4.1 | 7.6 | 7.6 |
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| Voltage | 2.8 | 2.8 | 1.9 | 1.8 | 1.8 | 1.9 | 2.0 |
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Competitors
See also
External links
- - Intel Pentium images and descriptions
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- Timeline with Pentium engineering samples and oldest known non-ES in correlation to their official release date.
Intel Datasheets
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