MasPar Computer Corporation was a
minisupercomputerMinisupercomputers constituted a class of computers that emerged in the mid-1980s. As scientific computing using vector processors became more popular, the need for lower-cost systems that might be used at the departmental level instead of the corporate level created an opportunity for new computer...
vendor that was founded in 1987 by Jeff Kalb. The company was based in
Santa Clara, CaliforniaSanta Clara, California , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. The city is the site of the eighth of 21 California missions, Mission Santa Clara de Asís, and was named after the mission...
.
While Kalb was the Vice-President of
DECDigital Equipment Corporation was a pioneering American company in the computer industry. It is often referred to within the computing industry as DEC...
's VLSI chip-building division, some researchers in that division were building a supercomputer based on the
Goodyear MPPThe Goodyear Massively Parallel Processor was amassively parallel processing supercomputer built by Goodyear Aerospacefor the NASA Goddard Space Flight Center.It was designed to deliver enormous computational power at lower cost than...
(massively parallel processor) supercomputer. The DEC researchers enhanced the architecture by:
- making the processor elements to be 4-bit
In computing and telecommunications a bit is a basic unit of information storage and communication . It is the maximum amount of information that can be stored by a device or other physical system that can normally exist in only two distinct states...
instead of 1-bit
- increasing the connectivity of each processor element to 8 neighbors from 4.
- adding a global interconnect for all of the processing elements, which was a triple-redundant switch which was easier to implement than a full crossbar switch
In electronics, a crossbar switch is a switch connecting multiple inputs to multiple outputs in a matrix manner....
.
After Digital decided not to productize the research project, Kalb decided to start a company to sell this minisupercomputer.
MasPar Computer Corporation was a
minisupercomputerMinisupercomputers constituted a class of computers that emerged in the mid-1980s. As scientific computing using vector processors became more popular, the need for lower-cost systems that might be used at the departmental level instead of the corporate level created an opportunity for new computer...
vendor that was founded in 1987 by Jeff Kalb. The company was based in
Santa Clara, CaliforniaSanta Clara, California , founded in 1777 and incorporated in 1852, is a city in Santa Clara County, in the U.S. state of California. The city is the site of the eighth of 21 California missions, Mission Santa Clara de Asís, and was named after the mission...
.
While Kalb was the Vice-President of
DECDigital Equipment Corporation was a pioneering American company in the computer industry. It is often referred to within the computing industry as DEC...
's VLSI chip-building division, some researchers in that division were building a supercomputer based on the
Goodyear MPPThe Goodyear Massively Parallel Processor was amassively parallel processing supercomputer built by Goodyear Aerospacefor the NASA Goddard Space Flight Center.It was designed to deliver enormous computational power at lower cost than...
(massively parallel processor) supercomputer. The DEC researchers enhanced the architecture by:
- making the processor elements to be 4-bit
In computing and telecommunications a bit is a basic unit of information storage and communication . It is the maximum amount of information that can be stored by a device or other physical system that can normally exist in only two distinct states...
instead of 1-bit
- increasing the connectivity of each processor element to 8 neighbors from 4.
- adding a global interconnect for all of the processing elements, which was a triple-redundant switch which was easier to implement than a full crossbar switch
In electronics, a crossbar switch is a switch connecting multiple inputs to multiple outputs in a matrix manner....
.
After Digital decided not to productize the research project, Kalb decided to start a company to sell this minisupercomputer. In 1990, the first generation product MP-1 was delivered. In 1992, the follow-on MP-2 was shipped. The company shipped a total of 200 systems. Samples of MasPar MPs, from the
NASAThe National Aeronautics and Space Administration is an agency of the United States government, responsible for the nation's public space program. NASA was established by the National Aeronautics and Space Act on July 29, 1958, replacing its predecessor, the National Advisory Committee for...
Goddard Space Flight CenterThe Goddard Space Flight Center is a major NASA space research laboratory established on May 1, 1959 as NASA's first space flight center. GSFC employs approximately 10,000 civil servants and contractors, and is located approximately northeast of Washington, D.C. in Greenbelt, Maryland, USA. The...
, are in storage at the
Computer History MuseumThe Computer History Museum is a museum established in 1996 in Mountain View, California, USA, when The Computer Museum sent the majority of its historical collection to Moffett Field, California, so that TCM could concentrate on computing-related exhibits for children...
.
Maspar offered a family of SIMD machines, second sourced by DEC. The processor units are proprietary.
MasPar exited the hardware business in June 1996. The new software company was called NeoVista. There were over 250 MP-2 installations. There was no MP-3.
By 1996, the company had halted hardware development and transformed itself into a
data miningData mining is the process of extracting patterns from data. As more data are gathered, with the amount of data doubling every three years, data mining is becoming an increasingly important tool to transform these data into information...
software company named Neovista Software. In 1999, Neovista was acquired by Accrue Software.
Hardware
MasPar is unique in being a manufacturer of
SIMDIn computing, SIMD is a technique employed to achieve data level parallelism.- History :...
supercomputers (as opposed to vector machines). In this approach, a collection of
ALUIn computing, an arithmetic logic unit is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers...
's listen to a program broadcast from a central source. The ALUs can do their own data fetch, but are all under control of a central Array Control Unit. There is a central clock. The emphasis is on communications efficiency, and low latency. The MasPar architecture is designed to scale, and balance processing, memory, and communication.
Maspar uses a
full customFull-custom design is a methodology for designing integrated circuits by specifying the layout of each individual transistor and the interconnections between them...
CMOSComplementary metal–oxide–semiconductor is a technology for making integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits. CMOS technology is also used for a wide variety of analog circuits such as image sensors, data...
chip, the MP-2 PE, designed in-house, and fabricated by various vendors such as HP or
TITexas Instruments , widely known as TI, is an American company based in Dallas, Texas, United States, renowned for developing and commercializing semiconductor and computer technology. TI is the No. 4 manufacturer of semiconductors worldwide after Intel, Samsung and Toshiba, and is the top supplier...
.
The Array Control Unit (ACU) handles instruction fetch. It is a load-store architecture. The MasPar architecture is
HarvardThe Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape and data in electro-mechanical counters...
in a broad sense. The ACU implements a
microcodeMicrocode is a layer of hardware-level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in a special high-speed memory and translates machine instructions into sequences of detailed...
d instruction fetch, but achieves a RISC-like 1 instruction per clock. The Arithmetic units, ALU's with data fetch capability, are implemented 32 to a chip. Each ALU is connected in a nearest neighbor fashion to 8 others. The edge connections are brought off-chip. In this scheme, the perimeters can be
toroidToroid may refer to*Toroid , a doughnut-like solid whose surface is a torus.*Toroidal inductors and transformers which have wire windings on circular ring shaped magnetic cores.*Vortex ring, a toroid-shaped flow in fluid mechanics....
-wrapped. Up to 16,384 units can be connected within the confines of a cabinet. A global router, essentially a cross-bar switch, provides external I/O to the processor array.
The MP-2 PE chip contains 32 processor elements, each a full 32-bit ALU with floating point, registers, and a
barrel shifterA barrel shifter is a digital circuit that can shift a data word by a specified number of bits in one clock cycle. It can be implemented as a sequence of multiplexers , and in such an implementation the output of one mux. is connected to the input of the next mux. in a way that depends on the shift...
. Only the instruction fetch feature is removed, and placed in the ACU. The PE design is literally replicated 32 times on the chip. The chip is designed to interface to
DRAMDram or DRAM may refer to:As a unit of measure:* Dram , an imperial unit of mass and volume* Armenian dram, a monetary unit* Dirham, a unit of currency in several Arab nationsOther uses:* Dynamic random access memory...
, to other processor array chips, and to communication router chips.
Each ALU, called a PE slice, contains sixty four 32 bit registers that are used for both integer and floating point. The registers are, interestingly, bit and
byteA byte is a unit of information storage representing the smallest addressable element for a given computer architecture. It often designates a sequence of bits whose length is determined by the architecture...
addressable. The floating point unit handles single precision and
double precisionIn computing, a double precision is a usually binary floating-point computer numbering format that occupies 8 bytes in computer memory.In IEEE 754-2008 the 64-bit base 2 format is officially referred to as binary64...
arithmetic on IEEE format numbers. Each PE slice contains two registers for data memory address, and the data. Each PE also has two one-bit serial ports, one for inbound and one for outbound communication to its nearest neighbor. The direction of communication is controlled globally. The PEs also have inbound and outbound paths to a global router for I/O. A broadcast port allows a single instance of data to be "promoted" to parallel data. Alternately, global data can be 'or-ed' to a scalar result.
The serial links support 1 Mbyte/s bit-serial communication that allows coordinated register-register communication between processors. Each processor has its own local memory, implemented in DRAM. No internal memory is included on the processors. Microcoded instruction decode is used.
The 32 PEs on a chip are clustered into two groups sharing a common memory interface, or M-machine, for access. A global scoreboard keeps track of memory and register usage. The path to memory is 16 bits wide. Both big and little endian formats are supported. Each processor has its own 64 Kbyte of memory. Both direct and indirect data memory addressing are supported.
The chip is implemented in 1.0-
micrometreA micrometre or micron is one millionth of a metre,or equivalently one thousandth of a millimetre....
, two-level, metal CMOS, dissipates 0.8 watt, and is packaged in a 208-pin
PQFPPQFP, or plastic quad flat pack, is a type of IC packaging. PQFP is a special case of QFP, as is the thinner TQFP package.PQFP packages can vary in thickness from 2.0 mm to 3.8 mm.-References:*...
. A relatively low clock rate of 12.5 MHz is used.
The Maspar machines are front ended by a host machine, usually a
VAXVAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
. They are accessed by extensions to
FortranFortran is a general-purpose, procedural, imperative programming language that is especially suited to numeric computation and scientific computing...
and
CC is a general-purpose computer programming language developed in 1972 by Dennis Ritchie at the Bell Telephone Laboratories for use with the Unix operating system....
. Full IEEE single- and double-precision floating point are supported.
There is no cache for the ALU's. Cache is not required, due to the memory interface operating at commensurate speed with the alu data accesses.
The ALU's do not implement
memory managementMemory management is the act of managing computer memory. In its simpler forms, this involves providing ways to allocate portions of memory to programs at their request, and freeing it for reuse when no longer needed...
for data memory. The ACU uses demand paged
virtual memoryVirtual memory is a computer system technique which gives an application program the impression that it has contiguous working memory , while in fact it may be physically fragmented and may even overflow on to disk storage. Systems that use this technique make programming of large applications...
for the instruction memory.
External links