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Frequency multiplier
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A frequency multiplier is commonly used in a radio receiver or radio transmitter to multiply the base frequency of the oscillator by a predetermined number. This multiplied frequency is then amplified and sent to the final drive stage and into the antenna tuning/coupling circuit for delivery to the transmitting antenna. The advantage is that a highly stable reference such as a crystal oscillator can be used, which may not be practical to manufacture for a higher frequency of interest.
More details
Frequency multipliers use circuits tuned to a harmonic of the input frequency.
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Encyclopedia
A frequency multiplier is commonly used in a radio receiver or radio transmitter to multiply the base frequency of the oscillator by a predetermined number. This multiplied frequency is then amplified and sent to the final drive stage and into the antenna tuning/coupling circuit for delivery to the transmitting antenna. The advantage is that a highly stable reference such as a crystal oscillator can be used, which may not be practical to manufacture for a higher frequency of interest.
More details
Frequency multipliers use circuits tuned to a harmonic of the input frequency. Non-linear elements such as diodes may be added to enhance the production of harmonic frequencies. Since the power in the harmonics declines rapidly, usually a frequency multiplier is tuned to only a small multiple (twice, three times, or five times) of the input frequency. Usually amplifiers are inserted in a chain of frequency multipliers to insure adequate signal level at the final frequency.
Step recovery diodes produce harmonics with power dropping at the rate of 1/N. Such diodes can often be found in frequency muliplier circuits.
Since the tuned circuits have a limited bandwidth, if the base frequency is changed significantly (more than one percent or so), the multiplier stages may have to be adjusted; this can take significant time if there are many stages.
In digital electronics, frequency multipliers are often used along with frequency dividers and phase-locked loops to generate any desired frequency from an external reference frequency. The frequency multiplication is actually carried out quite cleverly in the phase-locked loop's feedback loop, by using a frequency divider on the output of the voltage controlled oscillator (VCO). This divided-down output is fed-back to the input comparator and compared to the reference frequency. Since the divided down frequency is smaller than the reference frequency, the comparator generates a voltage signal to the VCO, telling it to increase the output frequency. It continues to do this via the feedback loop, raising the VCO output frequency, until the divided-down frequency from the VCO output is equal to the reference frequency. At this point the comparator stabilizes and generates no more signals to the VCO, or only minor changes to maintain stability. The output frequency from the VCO will be stable at the input reference frequency multiplied by the value of the feedback divider.
PLLs with frequency dividers
A PLL with a frequency divider in its feedback loop acts as a frequency multiplier and is a type of frequency synthesizer.
Integer-N synthesizer
In a configuration with an integer-N divider, its VCO's output frequency is N times its reference, or input, frequency.
Fractional-N synthesizer
Periodic changes in the integer value of an integer-N frequency divider will effectively result in a multiplier with both whole number and fractional component. Such a multiplier is called a fractional-N synthesier after its fractional component. Fractional-N synthesizers provide an effective means of achieving fine frequency resolution with lower values of N, allowing loop architectures with tens of thousands of times less phase noise than alternative designs with lower reference frequencies and higher integer N values. They also allow a faster settling time because of their higher reference frequencies, allowing wider closed and open loop bandwidths.
Delta sigma synthesizer
A delta sigma synthesizer adds a randomization to programmable-N frequency divider of the fractional-N synthesizer. This is done to shrink sidebands created by periodic changes of an integer-N frequency divider.
See also
frequency synthesizer and VFO
Further reading
- Egan, William F. 2000. Frequency Synthesis by Phase-lock, 2nd Ed., John Wiley & Sons, ISBN 0-471-32104-4
External links
- U.S. Patent 4,686,488, Attenborough, C. (1987, August 11)
- U.S. Patent 5,224,132, Bar-Giora Goldberg, (1993, June 29)
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