All Topics  
Clock gating

 

   Email Print
   Bookmark   Link






 

Clock gating



 
 
Clock gating is one of the power-saving techniques used on many synchronous circuits including the Pentium
Pentium

Introduced on March 22, 1993, the original Pentium was the first superscalar x86 architecture microprocessor. Its fifth-generation x86 microarchitecture was a direct extension of the 80486 architecture with dual integer pipeline s, a faster FPU unit, wider data bus, and features for further reduced address calculation latency....
 4 processor
Central processing unit

A central processing unit is an electronic circuit that can execute computer programs. This broad definition can easily be applied to many early computers that existed long before the term "CPU" ever came into widespread usage....
. To save power, clock gating support adds additional logic to a circuit to prune the clock tree, thus disabling portions of the circuitry so that its flip-flops
Flip-flop (electronics)

In digital circuits, a flip-flop is a term referring to an electronic circuit that has two stable states and thereby is capable of serving as one bit of computer storage....
 do not change state: their switching power consumption goes to zero, and only leakage currents are incurred.

Although asynchronous circuit
Asynchronous circuit

An asynchronous circuit is a electrical network in which the parts are largely autonomous. They are not governed by a clock circuit or global clock signal, but instead need only wait for the signals that indicate completion of instructions and operations....
s by definition do not have a "clock", the term perfect clock gating is used to illustrate how various clock gating techniques are simply approximations of the data-dependent behavior exhibited by asynchronous circuitry.






Discussion
Ask a question about 'Clock gating'
Start a new discussion about 'Clock gating'
Answer questions from other users
Full Discussion Forum



Encyclopedia


Clock gating is one of the power-saving techniques used on many synchronous circuits including the Pentium
Pentium

Introduced on March 22, 1993, the original Pentium was the first superscalar x86 architecture microprocessor. Its fifth-generation x86 microarchitecture was a direct extension of the 80486 architecture with dual integer pipeline s, a faster FPU unit, wider data bus, and features for further reduced address calculation latency....
 4 processor
Central processing unit

A central processing unit is an electronic circuit that can execute computer programs. This broad definition can easily be applied to many early computers that existed long before the term "CPU" ever came into widespread usage....
. To save power, clock gating support adds additional logic to a circuit to prune the clock tree, thus disabling portions of the circuitry so that its flip-flops
Flip-flop (electronics)

In digital circuits, a flip-flop is a term referring to an electronic circuit that has two stable states and thereby is capable of serving as one bit of computer storage....
 do not change state: their switching power consumption goes to zero, and only leakage currents are incurred.

Although asynchronous circuit
Asynchronous circuit

An asynchronous circuit is a electrical network in which the parts are largely autonomous. They are not governed by a clock circuit or global clock signal, but instead need only wait for the signals that indicate completion of instructions and operations....
s by definition do not have a "clock", the term perfect clock gating is used to illustrate how various clock gating techniques are simply approximations of the data-dependent behavior exhibited by asynchronous circuitry. As the granularity on which you gate the clock of a synchronous circuit approaches zero, the power consumption of that circuit approaches that of an asynchronous circuit: the circuit only generates logic transitions when it is actively computing.

Chip families such as OMAP3, with a cell phone heritage, support several forms of clock gating. At one end is manual gating of clocks by software, where a driver enables or disables the various clocks used by a given idle controller. On the other end is automatic clock gating, where the hardware can be told to detect whether there's any work to do, and turn off a given clock if it isn't needed. These modes interact. For example, an internal bridge or bus might use automatic gating so that it's gated off until the CPU or a DMA engine needs to use it.