An
asynchronous circuit is a
circuitAn electrical network is an interconnection of electrical elements such as resistors, inductors, capacitors, transmission lines, voltage sources, current sources, and switches....
in which the parts are largely autonomous. They are not governed by a clock circuit or global clock signal, but instead need only wait for the signals that indicate completion of instructions and operations. These signals are specified by simple data transfer protocols. This digital logic design is contrasted with a
synchronous circuitA synchronous circuit is a digital circuit in which the parts are synchronized by a clock signal.In an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. These transitions follow the level change of a special signal called the clock...
which operates according to clock timing signals.
Petri NetsA Petri net is one of several mathematical modeling languages for the description of discrete distributed systems. A Petri net is a directed bipartite graph, in which the nodes represent transitions , places A Petri net (also known as a place/transition net or P/T net) is one of several...
are an attractive and powerful model for reasoning about asynchronous circuits.
An
asynchronous circuit is a
circuitAn electrical network is an interconnection of electrical elements such as resistors, inductors, capacitors, transmission lines, voltage sources, current sources, and switches....
in which the parts are largely autonomous. They are not governed by a clock circuit or global clock signal, but instead need only wait for the signals that indicate completion of instructions and operations. These signals are specified by simple data transfer protocols. This digital logic design is contrasted with a
synchronous circuitA synchronous circuit is a digital circuit in which the parts are synchronized by a clock signal.In an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. These transitions follow the level change of a special signal called the clock...
which operates according to clock timing signals.
Theoretical foundations
Petri NetsA Petri net is one of several mathematical modeling languages for the description of discrete distributed systems. A Petri net is a directed bipartite graph, in which the nodes represent transitions , places A Petri net (also known as a place/transition net or P/T net) is one of several...
are an attractive and powerful model for reasoning about asynchronous circuits. However Petri nets have been criticized by
Carl HewittCarl E. Hewitt is Associate Professor Emeritus in the Electrical Engineering and Computer Science department at the Massachusetts Institute of Technology ....
for their lack of physical realism (see Petri net). Subsequent to Petri nets other models of concurrency have been developed that can model asynchronous circuits including the
Actor modelIn computer science, the Actor model is a mathematical model of concurrent computation that treats "actors" as the universal primitives of concurrent digital computation: in response to a message that it receives, an actor can make local decisions, create more actors, send more messages, and...
and process calculi.
The term
asynchronous logic is used to describe a variety of design styles, which use different assumptions about circuit properties. These vary from the bundled delay model - which uses 'conventional' data processing elements with completion indicated by a locally generated delay model - to delay-insensitive design - where arbitrary delays through circuit elements can be accommodated. The latter style tends to yield circuits which are larger than bundled data implementations, but which are insensitive to layout and parametric variations and are thus "correct by design."
Benefits
Different classes of asynchronous circuitry offer different advantages. Below is a list of the advantages offered by
Quasi Delay InsensitiveQuasi Delay-Insensitive circuits are a class of almost delay-insensitive asynchronous circuits which are invariant to the delays of any of the circuit's wires or elements, except to assume that certain fanouts are isochronic...
Circuits, generally agreed to be the most "pure" form of asynchronous logic that retains computational universality. Less pure forms of asynchronous circuitry offer better performance at the cost of compromising one or more of these advantages:
- Robust handling of metastability
Metastability in electronics is the ability of an unstable equilibrium electronic state to persist for an indefinite period in a digital system. Note this definition does not guarantee all of the properties that are sometimes demanded for a metastable state in statistical mechanics...
of arbiters-Asynchronous arbiters:An important form of arbiter is used in asynchronous circuits, to select the order of access to a shared resource among asynchronous requests. Its function is to prevent two operations from occurring at once when they should not...
.
- Early Completion
Early completion is a property of some classes of asynchronous circuit. It means that the output of a circuit may be available as soon as sufficient inputs have arrived to allow it to be determined. For example, if all of the inputs to a mux have arrived, and all are the same, but the select line...
of a circuit when it is known that the inputs which have not yet arrived are irrelevant.
- Possibly lower power consumption because no transistor ever transitions unless it is performing useful computation (clock gating
Clock gating is one of the power-saving techniques used on many synchronous circuits. To save power, clock gating support adds additional logic to a circuit to prune the clock tree, thus disabling portions of the circuitry so that its flip-flops do not change state: their switching power...
in synchronous designs is an imperfect approximation of this ideal). Also, clock drivers can be removed which can significantly reduce power consumption. However, when using certain encodings, asynchronous circuits may require more area, which can result in increased power consumption if the underlying process has poor leakage properties (for example, deep submicrometer processes used prior to the introduction of high-K dielectrics).
- Freedom from the ever-worsening difficulties of distributing a high-fanout
Fan-out is a measure of the ability of a logic gate output, implemented electronically, to drive a number of inputs of other logic gates of the same type. In most designs, logic gates are connected together to form more complex circuits, and it is common for one logic gate output to be connected to...
, timing-sensitive clock signal.
- Better modularity and composability.
- Far fewer assumptions about the manufacturing process are required (most assumptions are timing assumptions).
- Circuit speed is adapted on the fly to changing temperature and voltage conditions rather than being locked at the speed mandated by worst-case assumptions.
- Immunity to transistor-to-transistor variability in the manufacturing process, which is one of the most serious problems facing the semiconductor industry as dies shrink.
- Less severe electromagnetic interference
Electromagnetic interference is a disturbance that affects an electrical circuit due to either electromagnetic conduction or electromagnetic radiation emitted from an external source. The disturbance may interrupt, obstruct, or otherwise degrade or limit the effective performance of the circuit...
. Synchronous circuits create a great deal of EMI in the frequency band at (or very near) their clock frequency and its harmonics; asynchronous circuits generate EMI patterns which are much more evenly spread across the spectrum.
- In asynchronous circuits, local signaling eliminates the need for global synchronization which exploits some potential advantages in comparison with synchronous ones. They have shown potential specifications in low power consumption, design reuse, improved noise immunity and electromagnetic compatibility. Asynchronous circuits are more tolerant to process variations and external voltage fluctuationshttp://ceit.aut.ac.ir/~ghavami/publications.htm.
- Less stress on the power distribution network. Synchronous circuits tend to draw a large amount of current right at the clock edge and shortly thereafter. The number of nodes switching (and thence, amount of current drawn) drops off rapidly after the clock edge, reaching zero just before the next clock edge. In an asynchronous circuit, the switching times of the nodes are not correlated in this manner, so the current draw tends to be more uniform and less bursty.
Disadvantages
- Requires people experienced in synchronous design to learn a new style.
- Performance analysis of asynchronous circuits may be challenging.
Asynchronous CPU
Asynchronous CPUs are one of several ideas for radically changing CPU design.
Unlike a conventional processor, a clockless processor (asynchronous CPU) has no central clock to coordinate the progress of data through the pipeline.
Instead, stages of the CPU are coordinated using logic devices called "pipeline controls" or "FIFO sequencers." Basically, the pipeline controller clocks the next stage of logic when the existing stage is complete. In this way, a central clock is unnecessary. It may actually be even easier to implement high performance devices in asynchronous, as opposed to clocked, logic:
- components can run at different speeds on an asynchronous CPU; all major components of a clocked CPU must remain synchronized with the central clock;
- a traditional CPU cannot "go faster" than the expected worst-case performance of the slowest stage/instruction/component. When an asynchronous CPU completes an operation more quickly than anticipated, the next stage can immediately begin processing the results, rather than waiting for synchronization with a central clock. An operation might finish faster than normal because of attributes of the data being processed (e.g., multiplication can be very fast when multiplying by 0 or 1, even when running code produced by a naive compiler), or because of the presence of a higher voltage or bus speed setting, or a lower ambient temperature, than 'normal' or expected.
Asynchronous logic proponents believe these capabilities would have these benefits:
- lower power dissipation for a given performance level, and
- highest possible execution speeds.
The biggest disadvantage of the clockless CPU is that most CPU design tools assume a clocked CPU (i.e., a
synchronous circuitA synchronous circuit is a digital circuit in which the parts are synchronized by a clock signal.In an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. These transitions follow the level change of a special signal called the clock...
). Many tools "enforce synchronous design practices". Making a clockless CPU (designing an asynchronous circuit) involves modifying the design tools to handle clockless logic and doing extra testing to ensure the design avoids
metastableMetastability in electronics is the ability of an unstable equilibrium electronic state to persist for an indefinite period in a digital system. Note this definition does not guarantee all of the properties that are sometimes demanded for a metastable state in statistical mechanics...
problems. The group that designed the AMULET, for example, developed a tool called
LARD to cope with the complex design of AMULET3.
Despite the difficulty of doing so, numerous asynchronous CPUs have been built, including:
- the ORDVAC
The ORDVAC or Ordnance Discrete Variable Automatic Computer, an early computer built by the University of Illinois for the Ballistics Research Laboratory at Aberdeen Proving Ground, was based on the IAS architecture developed by John von Neumann, which came to be known as the von Neumann architecture...
(?) and the (identical) ILLIAC IThe ILLIAC I , a pioneering computer built in 1952 by the University of Illinois, was the first computer built and owned entirely by a US educational institution, Manchester University UK having built Manchester Mark 1 in 1948.ILLIAC I was based on the Institute for Advanced Study Von Neumann...
(1951),
- the ILLIAC II
The ILLIAC II was a revolutionary super-computer built by the University of Illinois that became operational in 1962. The concept, proposed in 1958, pioneered ECL circuitry, pipelining, and transistor memory with a design goal of 100x speedup compared to ILLIAC I.ILLIAC II had 8192 words of core...
(1962);
- The Caltech Asynchronous Microprocessor, the world-first asynchronous microprocessor (1988);
- the ARM
The ARM is a 32-bit reduced instruction set computer instruction set architecture developed by ARM Limited. It was known as the Advanced RISC Machine, and before that as the Acorn RISC Machine. The ARM architecture is the most widely used 32-bit ISA in terms of numbers produced...
-implementing AMULETAMULET is a series of microprocessors that implement the ARM processor architecture. Developed by the group under the University of Manchester's computer science school , AMULET is unique from other ARM implementations in that it is an asynchronous microprocessor, not making use of a square wave...
(1993 and 2000);
- the asynchronous implementation of MIPS
MIPS is a reduced instruction set computing instruction set architecture developed by MIPS Computer Systems . The early MIPS architectures were 32-bit, and later versions were 64-bit...
R3000, dubbed MiniMIPS (1998);
- an ARM-compatible processor (2003?) designed by Z. C. Yu, S. B. Furber, and L. A. Plana; "designed specifically to explore the benefits of asynchronous design for security sensitive applications";
- the "Network-based Asynchronous Architecture" processor (2005) that executes a subset of the MIPS architecture
MIPS is a reduced instruction set computing instruction set architecture developed by MIPS Computer Systems . The early MIPS architectures were 32-bit, and later versions were 64-bit...
instruction set;
- the SEAforth multi-core processor (2008) from Charles H. Moore
Charles H. Moore is the inventor of the Forth programming language.In 1968, while employed at the United States National Radio Astronomy Observatory , Moore invented the initial version of the Forth language to help control radio telescopes...
.
The
ILLIAC IIThe ILLIAC II was a revolutionary super-computer built by the University of Illinois that became operational in 1962. The concept, proposed in 1958, pioneered ECL circuitry, pipelining, and transistor memory with a design goal of 100x speedup compared to ILLIAC I.ILLIAC II had 8192 words of core...
was the first completely asynchronous, speed independent processor design ever built; it was the most powerful computing machine known to man at the time.
DEC PDP-16 Register Transfer Modules (ca. 1973) allowed the experimenter to construct asynchronous, 16-bit processing elements. Delays for each module were fixed and based on the module's worst-case timing.
The Caltech Asynchronous Microprocessor (1988) was the first asynchronous microprocessor (1988). Caltech designed and manufactured the world's first fully
Quasi Delay InsensitiveQuasi Delay-Insensitive circuits are a class of almost delay-insensitive asynchronous circuits which are invariant to the delays of any of the circuit's wires or elements, except to assume that certain fanouts are isochronic...
processor. During demonstrations, the researchers amazed viewers by loading a simple program which ran in a tight loop, pulsing one of the output lines after each instruction. This output line was connected to an oscilloscope. When a cup of hot coffee was placed on the chip, the pulse rate (the effective "clock rate") naturally slowed down to adapt to the worsening performance of the heated transistors. When
liquid nitrogenLiquid nitrogen is nitrogen in a liquid state at a very low temperature. It is produced industrially by fractional distillation of liquid air. Liquid nitrogen is a colourless clear liquid with density at its boiling point of 0.807 g/mL and a dielectric constant of 1.4...
was poured on the chip, the instruction rate shot up with no additional intervention. Additionally, at lower temperatures, the voltage supplied to the chip could be safely increased, which also improved the instruction rate—again, with no additional configuration.
In 2004, Epson manufactured the world's first flexible microprocessor called ACT11, an 8-bit asynchronous chip.
Synchronous flexible processors are slower, since bending the material on which a chip is fabricated causes wild and unpredictable variations in the delays of various transistors, for which worst case scenarios must be assumed everywhere and everything must be clocked at worst case speed. The processor is intended for use in smart cards, whose chips are currently limited in size to those small enough that they can remain perfectly rigid.
See also
- Synchronous Circuit
A synchronous circuit is a digital circuit in which the parts are synchronized by a clock signal.In an ideal synchronous circuit, every change in the logical levels of its storage components is simultaneous. These transitions follow the level change of a special signal called the clock...
- Sequential Logic
In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. This is in contrast to combinational logic, whose output is a function of, and only of, the present input...
(asynchronous)
External links