The
Apollo Guidance Computer (
AGC) provided onboard computation and control for guidance, navigation, and control of the Command Module (CM) and Lunar Module (LM) spacecraft of the Apollo program. It is notable for having been one of the first
ICAn integrated circuit or monolithic integrated circuit is an electronic circuit manufactured by the patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material...
-based computers.
The AGC and its DSKY user interface were developed in the early 1960s for the Apollo program by the MIT Instrumentation Laboratory.
AGC in Apollo
Each flight to the Moon (with the exception of Apollo 8, which didn't take a Lunar Module on its lunar orbit mission) had two AGCs, one each in the
Command ModuleThe Command/Service Module was one of two spacecraft, along with the Lunar Module, used for the United States Apollo program which landed astronauts on the Moon. It was built for NASA by North American Aviation...
and the
Lunar ModuleThe Apollo Lunar Module was the lander portion of the Apollo spacecraft built for the US Apollo program by Grumman to carry a crew of two from lunar orbit to the surface and back...
. The AGC in the Command Module was at the center of that spacecraft's guidance & navigation system (G&C). The AGC in the Lunar Module ran its
Primary Guidance, Navigation and Control SystemThe Apollo Primary Guidance, Navigation and Control System was a self-contained inertial guidance system that allowed Apollo spacecraft to carry out their missions when communications with Earth were interrupted, either as expected, when the spacecraft were behind the moon, or in case of a...
, called by the acronym
PGNCS .
Each lunar mission had two additional computers:
- The Launch Vehicle Digital Computer (LVDC)
The Saturn Launch Vehicle Digital Computer was one of the major components of the Instrument Unit fitted to the S-IVB stage of the Saturn V and Saturn IB rockets. Its primary role was to provide an autopilot for the Saturn from launch to orbit insertion, but it also supported pre- and post-launch...
on the Saturn VThe Saturn V was an American human-rated expendable rocket used by NASA's Apollo and Skylab programs from 1967 until 1973. A multistage liquid-fueled launch vehicle, NASA launched 13 Saturn Vs from the Kennedy Space Center, Florida with no loss of crew or payload...
booster instrumentation ring, and
- the Abort Guidance System (AGS)
The Apollo Abort Guidance System was a backup computer system providing an abort capability in the event of failure of the Lunar Module's primary guidance system during descent, ascent or rendezvous...
of the Lunar Module, to be used in the event of failure of the LM PGNCS. The AGS could be used to take off from the Moon, and to rendezvous with the Command Module, but not to land.
Design
The AGC was designed at the MIT Instrumentation Laboratory under
Charles Stark DraperCharles Stark Draper was an American scientist and engineer, often referred to as "the father of inertial navigation." He was the founder and director of the MIT Instrumentation Laboratory, later renamed the Charles Stark Draper Laboratory, which under his direction designed and built the Apollo...
, with hardware design led by
Eldon C. HallEldon Hall was the leader of hardware design efforts for the Apollo Guidance Computer at MIT, and advocated the use of integrated circuits for this task...
.
Early
architectural workIn computer science and engineering, computer architecture is the practical art of selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals and the formal modelling of those systems....
came from J.H. Laning Jr.,
Albert Hopkins,
Ramon Alonso,
and
Hugh Blair-Smith.
The flight hardware was fabricated by
RaytheonRaytheon Company is a major American defense contractor and industrial corporation with core manufacturing concentrations in weapons and military and commercial electronics. It was previously involved in corporate and special-mission aircraft until early 2007...
, whose Herb Thaler
was also on the architectural team.
The Apollo flight computer was the first to use
integrated circuits (ICs)An integrated circuit or monolithic integrated circuit is an electronic circuit manufactured by the patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material...
.
While the Block I version used 4,100 ICs, each containing a single 3-input
NOR gateThe NOR gate is a digital logic gate that implements logical NOR - it behaves according to the truth table to the right. A HIGH output results if both the inputs to the gate are LOW . If one or both input is HIGH , a LOW output results. NOR is the result of the negation of the OR operator...
, the later Block II version (used in the crewed flights) used 2,800 ICs, each with two 3-input NOR gates. The ICs, from
Fairchild SemiconductorFairchild Semiconductor International, Inc. is an American semiconductor company based in San Jose, California. Founded in 1957, it was a pioneer in transistor and integrated circuit manufacturing...
, were implemented using
resistor-transistor logicResistor–transistor logic is a class of digital circuits built using resistors as the input network and bipolar junction transistors as switching devices...
(RTL) in a
flat-packFlatpack is a US military standardized Printed-circuit-board surface-mount-component package. The military standard MIL-STD-1835C defines: Flat package...
. They were connected via
wire wrapWire wrap is a technology used to assemble electronics. It is a method to construct circuit boards without having to make a printed circuit board. Wires can be wrapped by hand or by machine, and can be hand-modified afterwards. It was popular for large-scale manufacturing in the 60s and early 70s,...
, and the wiring was then embedded in cast
epoxyEpoxy, also known as polyepoxide, is a thermosetting polymer formed from reaction of an epoxide "resin" with polyamine "hardener". Epoxy has a wide range of applications, including fiber-reinforced plastic materials and general purpose adhesives....
plastic. The use of a single type of IC (the dual NOR3) throughout the AGC avoided problems that plagued another early IC computer design, the
Minuteman IIThe LGM-30 Minuteman is a U.S. nuclear missile, a land-based intercontinental ballistic missile . As of 2010, the version LGM-30G Minuteman-III is the only land-based ICBM in service in the United States...
guidance computerThe D-37C is the computer component of the all-inertial NS-17 Missile Guidance Set for accurately navigating to its target thousands of miles away. The NS-17 MGS was used in the Minuteman II ICBM...
, which used a mix of
diode-transistor logicDiode–transistor logic is a class of digital circuits that is the direct ancestor of transistor–transistor logic. It is called so because the logic gating function is performed by a diode network and the amplifying function is performed by a transistor .- Implementations :The DTL circuit shown in...
and
diode logicDiode logic or diode-resistor logic constructs Boolean logic gates from diodes acting as electrically operated switches. While diode logic has the advantage of simplicity, the lack of an amplifying stage in each gate limits its application...
gates.
The computer had 2048 words of erasable
magnetic core memoryMagnetic-core memory was the predominant form of random-access computer memory for 20 years . It uses tiny magnetic toroids , the cores, through which wires are threaded to write and read information. Each core represents one bit of information...
and 36
kilowordsIn computing, a binary prefix is a specifier or mnemonic that is prepended to the units of digital information, the bit and the byte, to indicate multiplication by a power of 2...
of
read-onlyRead-only memory is a class of storage medium used in computers and other electronic devices. Data stored in ROM cannot be modified, or can be modified only slowly or with difficulty, so it is mainly used to distribute firmware .In its strictest sense, ROM refers only...
core rope memoryCore rope memory is a form of read-only memory for computers, first used by early NASA Mars probes and then in the Apollo Guidance Computer designed and programmed by the MIT Instrumentation Lab and built by Raytheon....
. Both had cycle times of 11.72 micro-seconds. The memory word length was 16 bits: 15 bits of data and 1 odd-
parity bitA parity bit is a bit that is added to ensure that the number of bits with the value one in a set of bits is even or odd. Parity bits are used as the simplest form of error detecting code....
. The
CPUThe central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
-internal
16-bit-16-bit architecture:The HP BPC, introduced in 1975, was the world's first 16-bit microprocessor. Prominent 16-bit processors include the PDP-11, Intel 8086, Intel 80286 and the WDC 65C816. The Intel 8088 was program-compatible with the Intel 8086, and was 16-bit in that its registers were 16...
word format was 14 bits of data, 1
overflowThe term arithmetic overflow or simply overflow has the following meanings.# In a computer, the condition that occurs when a calculation produces a result that is greater in magnitude than that which a given register or storage location can store or represent.# In a computer, the amount by which a...
bit, and 1 sign bit (ones' complement representation).
DSKY interface
The
user interfaceThe user interface, in the industrial design field of human–machine interaction, is the space where interaction between humans and machines occurs. The goal of interaction between a human and a machine at the user interface is effective operation and control of the machine, and feedback from the...
to the AGC was the
DSKY, standing for
display and keyboard and usually pronounced
dis-key. It had an array of indicator lights, numeric displays and a
calculatorAn electronic calculator is a small, portable, usually inexpensive electronic device used to perform the basic operations of arithmetic. Modern calculators are more portable than most computers, though most PDAs are comparable in size to handheld calculators.The first solid-state electronic...
-style keyboard. Commands were entered numerically, as two-digit numbers:
VerbA verb, from the Latin verbum meaning word, is a word that in syntax conveys an action , or a state of being . In the usual description of English, the basic form, with or without the particle to, is the infinitive...
, and
NounIn linguistics, a noun is a member of a large, open lexical category whose members can occur as the main word in the subject of a clause, the object of a verb, or the object of a preposition .Lexical categories are defined in terms of how their members combine with other kinds of...
.
Verb described the type of action to be performed and
Noun specified which data was affected by the action specified by the Verb command.
The numerals were displayed via green high-voltage
electroluminescentElectroluminescence is an optical phenomenon and electrical phenomenon in which a material emits light in response to the passage of an electric current or to a strong electric field...
seven segment displays. The segments were driven by electromechanical
relayA relay is an electrically operated switch. Many relays use an electromagnet to operate a switching mechanism mechanically, but other operating principles are also used. Relays are used where it is necessary to control a circuit by a low-power signal , or where several circuits must be controlled...
s, which limited the display update rate (Block II used faster silicon controlled rectifiers). Three 5-digit signed numbers could also be displayed in
octalThe octal numeral system, or oct for short, is the base-8 number system, and uses the digits 0 to 7. Numerals can be made from binary numerals by grouping consecutive binary digits into groups of three...
or
decimalThe decimal numeral system has ten as its base. It is the numerical base most widely used by modern civilizations....
, and were typically used to display vectors such as space craft attitude or a required velocity change (
delta-VIn astrodynamics a Δv or delta-v is a scalar which takes units of speed. It is a measure of the amount of "effort" that is needed to change from one trajectory to another by making an orbital maneuver....
). Although data were stored internally in
metric unitsThe International System of Units is the modern form of the metric system and is generally a system of units of measurement devised around seven base units and the convenience of the number ten. The older metric system included several groups of units...
, they were displayed as
United States customary unitsUnited States customary units are a system of measurements commonly used in the United States. Many U.S. units are virtually identical to their imperial counterparts, but the U.S. customary system developed from English units used in the British Empire before the system of imperial units was...
. This calculator-style interface
The first advanced desktop calculators hit the market in roughly the same time frame, with scientific and then programmable pocket calculators appearing during the following decade. The first programmable handheld calculatorProgrammable calculators are calculators that can automatically carry out a sequence of operations under control of a stored program, much like a computer. The first programmable calculators such as the IBM CPC used punched cards or other media for program storage...
, the HP-65The HP-65 was the first magnetic card-programmable handheld calculator. Introduced by Hewlett-Packard in 1974 at an MSRP of $795, it featured nine storage registers and room for 100 keystroke instructions. It also included a magnetic card reader/writer to save and load programs...
, was tried on backup computations aboard the Apollo Command/Service Module in the Apollo-Soyuz Test Project-Backup crew:-Crew notes:Jack Swigert had originally been assigned as the command module pilot for the ASTP prime crew, but prior to the official announcement he was removed as punishment for his involvement in the Apollo 15 postage stamp scandal.-Soyuz crew:...
in 1975.
was the first of its kind, the prototype for all similar digital control panel interfaces.
The Command Module had two DSKYs connected to its AGC; one located on the main instrument panel and a second located in the lower equipment bay near a
sextantA sextant is an instrument used to measure the angle between any two visible objects. Its primary use is to determine the angle between a celestial object and the horizon which is known as the altitude. Making this measurement is known as sighting the object, shooting the object, or taking a sight...
used for aligning the inertial guidance platform. The Lunar Module had a single DSKY for its AGC. A
flight director attitude indicatorIn aviation, a flight director is a navigational aid that is overlaid on the attitude indicator that shows the pilot of an aircraft the attitude required to follow a certain trajectory.-Description:...
(FDAI), controlled by the AGC, was located above the DSKY on the commander's console and on the LM.
In 2009, a DSKY was sold in a public auction held by
Heritage AuctionsHeritage Auction Galleries is the world's largest collectibles auctioneer and the third largest auction house, with over $700 million in annual sales and 600,000 online bidder-members...
for $50,788.
Timing
The AGC timing reference came from a 2.048 MHz
crystalA crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical signal with a very precise frequency...
clockThe clock rate typically refers to the frequency that a CPU is running at.For example, a crystal oscillator frequency reference typically is synonymous with a fixed sinusoidal waveform, a clock rate is that frequency reference translated by electronic circuitry into a corresponding square wave...
. The clock was divided by two to produce a four-phase 1.024 MHz clock which the AGC used to perform internal operations. The 1.024 MHz clock was also divided by two to produce a 512 kHz signal called the
master frequency; this signal was used to synchronize external Apollo spacecraft systems.
The master frequency was further divided through a
scaler, first by five using a ring counter to produce a 102.4 kHz signal. This was then divided by two through 17 successive stages called F1 (51.2 kHz) through F17 (0.78125 Hz). The F10 stage (100 Hz) was fed back into the AGC to increment the
real-time clockA real-time clock is a computer clock that keeps track of the current time. Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are present in almost any electronic device which needs to keep accurate time.-Terminology:The term is used to avoid...
and other involuntary counters using Pinc (discussed below). The F17 stage was used to intermittently run the AGC when it was operating in the
standby mode.
Central registers
The AGC had four 16-bit
registerIn computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are addressed by mechanisms other than main memory and can be accessed more quickly...
s for general computational use, called the
central registers:
| A : |
The accumulator In a computer's central processing unit , an accumulator is a register in which intermediate arithmetic and logic results are stored. Without a register like an accumulator, it would be necessary to write the result of each calculation to main memory, perhaps only to be read right back again for...
, for general computation |
| Z : |
The program counter The program counter , commonly called the instruction pointer in Intel x86 microprocessors, and sometimes called the instruction address register, or just part of the instruction sequencer in some computers, is a processor register that indicates where the computer is in its instruction sequence...
- the address of the next instruction to be executed |
| Q : |
The remainder from the DV instruction, and the return addressIn postal mail, a return address is an explicit inclusion of the address of the person sending the message. It provides the recipient with a means to determine how to respond to the sender of the message if needed....
after TC instructions |
| LP : |
The lower product after MP instructions |
There were also four locations in core memory, at addresses 20-23, dubbed
editing locations because whatever was stored there would emerge shifted or rotated by one bit position, except for one that shifted right 7 bit positions, to extract one of the 7-bit interpretive op. codes that were packed 2 to a word. This was common to Block I and Block II AGCs.
Other registers
The AGC had additional registers that were used internally in the course of operation:
| S |
: |
12-bit memory address register, the lower portion of the memory address |
| Bank/Fbank |
: |
4-bit ROM bank register, to select the 1 kiloword ROM bank when addressing in the fixed-switchable mode |
| Ebank |
: |
3-bit RAM bank register, to select the 256-word RAM bank when addressing in the erasable-switchable mode |
| Sbank (super-bank) |
: |
1-bit extension to Fbank, required because the last 4 kilowords of the 36-kiloword ROM was not reachable using Fbank alone |
| SQ |
: |
4-bit sequence register; the current instruction |
| G |
: |
16-bit memory buffer register, to hold data words moving to and from memory |
| X |
: |
The 'x' input to the adder (the adder was used to perform all 1's complement arithmetic) or the increment to the program counter (Z register) |
| Y |
: |
The other ('y') input to the adder |
| U |
: |
Not really a register, but the output of the adder (the 1's complement sum of the contents of registers X and Y) |
| B |
: |
General-purpose buffer register, also used to pre-fetch the next instruction. At the start of the next instruction, the upper bits of B (containing the next op. code) were copied to SQ, and the lower bits (the address) were copied to S. |
| C |
: |
Not a separate register, but the 1's complement of the B register |
| IN |
: |
Four 16-bit input registers |
| OUT |
: |
Five 16-bit output registers |
Instruction set
The
instruction formatAn instruction set, or instruction set architecture , is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O...
used 3 bits for
opcodeIn computer science engineering, an opcode is the portion of a machine language instruction that specifies the operation to be performed. Their specification and format are laid out in the instruction set architecture of the processor in question...
, and 12 bits for address. Block I had 11 instructions:
TC,
CCS,
INDEX,
XCH,
CS,
TS,
AD, and
MASK (basic), and
SU,
MP, and
DV (extra). The first eight, called
basic instructions, were directly accessed by the 3-bit op. code. The final three were denoted as
extracode instructions because they were accessed by performing a special type of
INDEX instruction (called
EXTEND) immediately before the instruction.
The Block I AGC instructions consisted of the following:
TC (transfer control): An unconditional branch to the address specified by the instruction. The return address was automatically stored in the Q register, so the
TC instruction could be used for subroutine calls.
CCS (count, compare, and skip): A complex conditional branch instruction. The A register was loaded with data retrieved from the address specified by the instruction. (Because the AGC uses ones' complement notation, there are two representations of zero. When all bits are set to zero, this is called
plus zero. If all bits are set to one, this is called
minus zero.) The
diminished absolute value (DABS) of the data was then computed and stored in the A register. If the number was greater than zero, the DABS decrements the value by 1; if the number was negative, it is complemented before the decrement is applied—this is the absolute value.
Diminished means "decremented but not below zero". Therefore, when the AGC performs the DABS function, positive numbers will head toward plus zero, and so will negative numbers but first revealing their negativity via the four-way skip below. The final step in
CCS is a four-way skip, depending upon the data in register A before the DABS. If register A was greater than 0,
CCS skips to the first instruction immediately after
CCS. If register A contained plus zero,
CCS skips to the second instruction after
CCS. Less than zero causes a skip to the third instruction after
CCS, and minus zero skips to the fourth instruction after
CCS. The primary purpose of the count was to allow an ordinary loop, controlled by a positive counter, to end in a
CCS and a
TC to the beginning of the loop, equivalent to an
IBM 360The IBM System/360 was a mainframe computer system family first announced by IBM on April 7, 1964, and sold between 1964 and 1978. It was the first family of computers designed to cover the complete range of applications, from small to large, both commercial and scientific...
's
BCT. The absolute value function was deemed important enough to be built into this instruction; when used for only this purpose, the sequence after the
CCS was
TC *+2,
TC *+2,
AD ONE. A curious side effect was the creation and use of
CCS-holes when the value being tested was known to be never positive, which occurred more often than one might suppose. That left two whole words unoccupied, and a special committee was responsible for assigning data constants to these holes.
INDEX: Add the data retrieved at the address specified by the instruction to the next instruction.
INDEX can be used to add or subtract an index value to the
base addressIn computing, a base address is an address serving as a reference point for other addresses.In computers using relative addressing scheme, to obtain an absolute address, the relevant base address is taken and offset is added to it....
specified by the operand of the instruction that follows
INDEX. This method is used to implement arrays and table look-ups; since the addition was done on both whole words, it was also used to modify the op. code in a following (extracode) instruction, and on rare occasions both functions at once.
RESUME: A special instance of
INDEX (
INDEX 25). This is the instruction used to return from interrupts. It causes execution to resume at the interrupted location.
XCH (exchange): Exchange the contents of memory with the contents of the A register. If the specified memory address is in fixed (read-only) memory, the memory contents are not affected, and this instruction simply loads register A. If it is in erasable memory, overflow "correction" is achieved by storing the leftmost of the 16 bits in A as the sign bit in memory, but there is no exceptional behavior like that of
TS.
CS (clear and subtract): Load register A with the one's complement of the data referenced by the specified memory address.
TS (transfer to storage): Store register A at the specified memory address.
TS also detects, and corrects for,
overflowThe term arithmetic overflow or simply overflow has the following meanings.# In a computer, the condition that occurs when a calculation produces a result that is greater in magnitude than that which a given register or storage location can store or represent.# In a computer, the amount by which a...
s in such a way as to propagate a carry for multi-precision add/subtract. If the result has no overflow (leftmost 2 bits of A the same), nothing special happens; if there is overflow (those 2 bits differ), the leftmost one goes the memory as the sign bit, register A is changed to +1 or -1 accordingly, and control skips to the second instruction following the
TS. Whenever overflow is a possible but abnormal event, the
TS was followed by a
TC to the no-overflow logic; when it is a normal possibility (as in multi-precision add/subtract), the
TS is followed by
CAF ZERO (
CAF =
XCH to fixed memory) to complete the formation of the carry (+1, 0, or -1) into the next higher-precision word. Angles were kept in single precision, distances and velocities in
double precisionIn computing, double precision is a computer number format that occupies two adjacent storage locations in computer memory. A double-precision number, sometimes simply called a double, may be defined to be an integer, fixed point, or floating point .Modern computers with 32-bit storage locations...
, and elapsed time in triple precision.
AD (add): Add the contents of memory to register A and store the result in A. The 2 leftmost bits of A may be different (overflow state) before and/or after the
AD. The fact that overflow is a state rather than an event forgives limited extents of overflow when adding more than two numbers, as long as none of the intermediate totals exceed twice the capacity of a word.
MASK: Perform a bit-wise (boolean)
and of memory with register A and store the result in register A.
MP (multiply): Multiply the contents of register A by the data at the referenced memory address and store the high-order product in register A and the low-order product in register LP. The parts of the product agree in sign.
DV (divide): Divide the contents of register A by the data at the referenced memory address. Store the quotient in register A and the absolute value of the remainder in register Q. Unlike modern machines,
fixed-point numbersIn computing, a fixed-point number representation is a real data type for a number that has a fixed number of digits after the radix point...
were treated as fractions (notional decimal point just to right of the sign bit), so you could produce garbage if the divisor was not larger than the dividend; there was no protection against that situation. In the Block II AGC, a double-precision dividend started in A and L (the Block II LP), and the correctly signed remainder was delivered in L. That considerably simplified the subroutine for double precision division.
SU (subtract): Subtract (one's complement) the data at the referenced memory address from the contents of register A and store the result in A.
Instructions were implemented in groups of 12 steps, called
timing pulses. The timing pulses were named TP1 through TP12. Each set of 12 timing pulses was called an instruction
subsequence. Simple instructions, such as TC, executed in a single subsequence of 12 pulses. More complex instructions required several subsequences. The multiply instruction (
MP) used 8 subsequences: an initial one called
MP0, followed by an
MP1 subsequence which was repeated 6 times, and then terminated by an
MP3 subsequence. This was reduced to 3 subsequences in Block II.
Each timing pulse in a subsequence could trigger up to 5
control pulses. The control pulses were the signals which did the actual work of the instruction, such as reading the contents of a register onto the bus, or writing data from the bus into a register.
Memory
Block I AGC memory was organized into 1 kiloword banks. The lowest bank (bank 0) was erasable memory (RAM). All banks above bank 0 were fixed memory (ROM). Each AGC instruction had a 12-bit address field. The lower bits (1-10) addressed the memory inside each bank. Bits 11 and 12 selected the bank: 00 selected the erasable memory bank; 01 selected the lowest bank (bank 1) of fixed memory; 10 selected the next one (bank 2); and 11 selected the
Bank register that could be used to select any bank above 2. Banks 1 and 2 were called
fixed-fixed memory, because they were always available, regardless of the contents of the Bank register. Banks 3 and above were called
fixed-switchable because the selected bank was determined by the bank register.
The Block I AGC initially had 12 kilowords of fixed memory, but this was later increased to 24 kilowords. Block II had 32 kilowords of fixed memory and 4 kilowords of erasable memory.
The AGC transferred data to and from memory through the G register in a process called the
memory cycle. The memory cycle took 12 timing pulses (11.72 μs). The cycle began at timing pulse 1 (TP1) when the AGC loaded the memory address to be fetched into the S register. The memory hardware retrieved the data word from memory at the address specified by the S register. Words from erasable memory were deposited into the G register by timing pulse 6 (TP6); words from fixed memory were available by timing pulse 7. The retrieved memory word was then available in the G register for AGC access during timing pulses 7 through 10. After timing pulse 10, the data in the G register was written back to memory.
The AGC memory cycle occurred continuously during AGC operation. Instructions needing memory data had to access it during timing pulses 7-10. If the AGC changed the memory word in the G register, the changed word was written back to memory after timing pulse 10. In this way, data words cycled continuously from memory to the G register and then back again to memory.
The lower 15 bits of each memory word held AGC instructions or data. Each word protected by a 16th odd parity bit. This bit was set to 1 or 0 by a parity generator circuit so a count of the 1s in each memory word would always produce an odd number. A parity checking circuit tested the parity bit during each memory cycle; if the bit didn't match the expected value, the memory word was assumed to be corrupted and a
parity alarm panel light was illuminated.
Interrupts and involuntary counters
The AGC had five vectored
interruptIn computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
s:
- Dsrupt was triggered at regular intervals to update the user display (DSKY).
- Erupt was generated by various hardware failures or alarms.
- Keyrupt signaled a key press from the user's keyboard.
- T3Rrupt was generated at regular intervals from a hardware timer to update the AGC's real-time clock
A real-time clock is a computer clock that keeps track of the current time. Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are present in almost any electronic device which needs to keep accurate time.-Terminology:The term is used to avoid...
.
- Uprupt was generated each time a 16-bit word of uplink data was loaded into the AGC.
The AGC responded to each interrupt by temporarily suspending the current program, executing a short interrupt service routine, and then resuming the interrupted program.
The AGC also had 20 involuntary
counterIn digital logic and computing, a counter is a device which stores the number of times a particular event or process has occurred, often in relationship to a clock signal.- Electronic counters :...
s. These were memory locations which functioned as up/down counters, or shift registers. The counters would increment, decrement, or shift in response to internal inputs. The increment (
Pinc), decrement (
Minc), or shift (
Shinc) was handled by one subsequence of microinstructions inserted between any two regular instructions.
Interrupts could be triggered when the counters overflowed. The T3rupt and Dsrupt interrupts were produced when their counters, driven by a 100 Hz hardware clock, overflowed after executing many Pinc subsequences. The Uprupt interrupt was triggered after its counter, executing the Shinc subsequence, had shifted 16 bits of uplink data into the AGC.
Standby mode
The AGC had a power-saving mode controlled by a
standby allowed switch. This mode turned off the AGC power, except for the 2.048 MHz clock and the scaler. The F17 signal from the scaler turned the AGC power and the AGC back on at 1.28 second intervals. In this mode, the AGC performed essential functions, checked the standby allowed switch, and, if still enabled, turned off the power and went back to sleep until the next F17 signal.
In the standby mode, the AGC slept most of the time; therefore it was not awake to perform the Pinc instruction needed to update the AGC's real time clock at 10 ms intervals. To compensate, one of the functions performed by the AGC each time it awoke in the standby mode was to update the real time clock by 1.28 seconds.
The standby mode was designed to reduce power by 5 to 10 W (from 70 W) during midcourse flight when the AGC was not needed. However, in practice, the AGC was left on during all phases of the mission and this feature was never used.
Data buses
The AGC had a 16-bit read bus and a 16-bit write bus. Data from central registers (A, Q, Z, or LP), or other internal registers could be gated onto the read bus with a control signal. The read bus connected to the write bus through a non-inverting buffer, so any data appearing on the read bus also appeared on the write bus. Other control signals could copy write bus data back into the registers.
Data transfers worked like this: To move the address of the next instruction from the B register to the S register, an RB (read B) control signal was issued; this caused the address to move from register B to the read bus, and then to the write bus. A WS (write S) control signal moved the address from the write bus into the S register.
Several registers could be read onto the read bus simultaneously. When this occurred, data from each register was inclusive-
ored onto the bus. This inclusive-
or feature was used to implement the Mask instruction, which was a logical
and operation. Because the AGC had no native ability to do a logical
and, but could do a logical
or through the bus and could complement (invert) data through the C register,
De Morgan's theorem was used to implement the equivalent of a logical
and. This was accomplished by inverting both operands, performing a logical
or through the bus, and then inverting the result.
Software
When the design requirements for the AGC were defined, necessary software and programming techniques didn't exist so it had to be designed from scratch.
AGC software was written in AGC
assembly languageAn assembly language is a low-level programming language for computers, microprocessors, microcontrollers, and other programmable devices. It implements a symbolic representation of the machine codes and other constants needed to program a given CPU architecture...
and stored on rope memory. There was a simple
real-time operating systemA real-time operating system is an operating system intended to serve real-time application requests.A key characteristic of a RTOS is the level of its consistency concerning the amount of time it takes to accept and complete an application's task; the variability is jitter...
consisting of the
Exec, a batch job-scheduling system that could run up to 8 'jobs' at a time using cooperative multi-tasking (each job had to periodically surrender control back to the Exec which then checked if there was any waiting job with higher priority). There was also an interrupt-driven component called the
Waitlist which could schedule multiple timer-driven 'tasks'. The tasks were short threads of execution which could reschedule themselves for re-execution on the Waitlist, or could kick off a longer operation by starting a 'job' with the Exec.
The Exec jobs were priority-based. The lowest priority job, called the dummy job, was always present. It did diagnostic checks and controlled a green
computer activity light on the DSKY: If the dummy job was running, this meant the computer had nothing better to do, so the light was turned off. The dummy job exited if there was some higher priority job to be done and this was indicated by the computer activity light being illuminated.
The AGC also had a sophisticated software interpreter, developed by MIT, that implemented a virtual machine with more complex and capable pseudo-instructions than the native AGC. They were used when navigational computations of greater precision than 8 bits were required. Interpreted code, which featured double precision scalar and vector arithmetic, even an
MXV (matrix × vector) instruction, could be mixed with native AGC code. While the execution time of the pseudo-instructions was increased (due to the need to interpret these instructions at runtime) the interpreter provided many more instructions than AGC natively supported and the memory requirements were much lower than in the case of adding these instructions to the AGC native language (memory capacity was very expensive at the time). The average pseudo-instruction required about 24 ms to execute. The assembler and version control system, named
YUL for an early prototype
Christmas Computer, enforced proper transitions between native and interpreted code.
A set of interrupt-driven user interface routines called
Pinball provided keyboard and display services for the jobs and tasks running on the AGC. A rich set of user-accessible routines were provided to let the operator (astronaut) display the contents of various memory locations in
octalThe octal numeral system, or oct for short, is the base-8 number system, and uses the digits 0 to 7. Numerals can be made from binary numerals by grouping consecutive binary digits into groups of three...
or decimal in groups of 1, 2, or 3 registers at a time.
Monitor routines were provided so the operator could initiate a task to periodically redisplay the contents of certain memory locations. Jobs could be initiated. The Pinball routines performed the (very rough) equivalent of the UNIX shell.
The bulk of the software was on read-only rope memory and thus couldn't be changed in operation, but some key parts of the software were stored in standard read-write magnetic-core memory and could be overwritten by the astronauts using the DSKY interface, as was done on
Apollo 14Apollo 14 was the eighth manned mission in the American Apollo program, and the third to land on the Moon. It was the last of the "H missions", targeted landings with two-day stays on the Moon with two lunar EVAs, or moonwalks....
.
The Block II
A Block II version of the AGC was designed in 1966. It retained the basic Block I architecture, but increased erasable memory from 1 to 2 kilowords. Fixed memory was expanded from 24 to 36 kilowords. Instructions were expanded from 11 to 34 and I/O channels were implemented to replace the I/O registers on Block I. The Block II version is the one that actually flew to the moon. Block I was used during the unmanned
Apollo 4Apollo 4, , was the first unmanned test flight of the Saturn V launch vehicle, which was ultimately used by the Apollo program to send the first men to the Moon...
and
6Apollo 6, launched on April 4, 1968, was the Apollo program's second and last A type mission—unmanned test flight of its Saturn V launch vehicle. It was intended to demonstrate full lunar injection capability of the Saturn V, and the capability of the Command Module's heat shield to withstand a...
flights, and was on board the ill-fated Apollo I.
The decision to expand the memory and instruction set for Block II, but to retain the Block I's restrictive 3-bit op. code and 12-bit address had interesting design consequences. Various tricks were employed to squeeze in additional instructions, such as having special memory addresses which, when referenced, would implement a certain function. For instance, an
INDEX to address 25 triggered the
RESUME instruction to return from an interrupt. Likewise,
INDEX 17 performed an
INHINT instruction (inhibit interrupts), while
INDEX 16 reenabled them (
RELINT). Other instructions were implemented by preceding them with a special version of
INDEX called
EXTEND which arithmetically modified the 3-bit op. code by employing the overflow bit to extend it. The address spaces were extended by employing the Bank (fixed) and Ebank (erasable) registers, so the only memory of either type that could be addressed at any given time was the current bank, plus the small amount of fixed-fixed memory and the erasable memory. In addition, the bank register could address a maximum of 32 kilowords, so an Sbank (super-bank) register was required to access the last 4 kilowords. All across-bank subroutine calls had to be initiated from fixed-fixed memory through special functions to restore the original bank during the return—essentially a system of
far pointerIn a segmented architecture computer, a far pointer is a pointer which includes a segment selector, making it possible to point to addresses outside of the current segment....
s.
The Block II AGC also has the mysterious and poorly documented
EDRUPT instruction (the name may be a contraction of
Ed's Interrupt, after Ed Smally, the programmer who requested it) which is used a total of once in the Apollo software: in the Digital Autopilot of the Lunar Module. At this time, while the general operation of the instruction is understood, the precise details are still hazy, and it is believed to be responsible for problems emulating the LEM AGC Luminary software.
PGNCS trouble
PGNCSThe Apollo Primary Guidance, Navigation and Control System was a self-contained inertial guidance system that allowed Apollo spacecraft to carry out their missions when communications with Earth were interrupted, either as expected, when the spacecraft were behind the moon, or in case of a...
generated unanticipated warnings during Apollo 11's lunar descent, with the AGC showing a
1201 alarm ("Executive overflow - no vacant areas") and a
1202 alarm ("Executive overflow - no core sets").
The cause was a rapid, steady stream of spurious
cycle stealsCycle stealing is used to describe the "stealing" of a single CPU cycle, for example, to allow a DMA controller to perform a DMA operation. This is opposed to block operation where a DMA controller would request a bus, hold it for a complete transaction before releasing to a CPU.Cycle stealing...
from the rendezvous radar, intentionally left on standby during the descent in case it was needed for an abort.
During this part of the approach the processor would normally be almost 85% loaded. The extra 6400 cycle steals per second added the equivalent of 13% load, leaving just enough time for all scheduled tasks to run to completion. Five minutes into the descent Buzz Aldrin gave the computer the command 1668 which instructed it to calculate and display DELTAH (the difference between altitude sensed by the radar and the computed altitude). This added an additional 10% to the processor workload causing executive overflow and a 1202 alarm. After being given the "GO" from Houston Aldrin entered 1668 again and another 1202 alarm occurred. When reporting the second alarm Aldrin added the comment "It appears to come up when we have a 1668 up". Happily for
Apollo 11In early 1969, Bill Anders accepted a job with the National Space Council effective in August 1969 and announced his retirement as an astronaut. At that point Ken Mattingly was moved from the support crew into parallel training with Anders as backup Command Module Pilot in case Apollo 11 was...
, the AGC software had been designed with priority scheduling.
Just as it had been designed to do, the software automatically recovered, deleting lower priority tasks including the 1668 display task, to complete its critical guidance and control tasks. Guidance controller
Steve BalesSteve Bales is a former NASA engineer and flight controller. He is best known for his role during the Apollo 11 lunar landing.-Early life:Bales was born in Ottumwa, Iowa, and grew up in the nearby town of Fremont. His father was a school janitor and his mother was a beautician...
and his support team that included
Jack GarmanJohn R. "Jack" Garman is a computer engineer, former senior NASA executive and a noted key figure of the Apollo 11 lunar landing. As a young specialist on duty during the final descent stage on 20 July 1969 he dealt with a series of computer alarms which could have caused the mission to be...
issued several "GO" calls and the landing was successful. For his role, Bales received the US
Medal of FreedomThe Presidential Medal of Freedom is an award bestowed by the President of the United States and is—along with thecomparable Congressional Gold Medal bestowed by an act of U.S. Congress—the highest civilian award in the United States...
on behalf of the entire control center team and the three Apollo astronauts.
The problem was
not a programming error in the AGC, nor was it pilot error. It was a peripheral hardware design bug that was already known and documented by Apollo 5 engineers.
However because the problem had only occurred once during testing they concluded that it was safer to fly with the existing hardware that they had already tested, than to fly with a newer but largely untested radar system. In the actual hardware, the position of the rendezvous radar was encoded with
synchroA synchro is a type of rotary electrical transformer that is used for measuring the angle of a rotating machine such as an antenna platform. In its general physical construction, it is much like an electric motor...
s excited by a different source of 800 Hz AC than the one used by the computer as a timing reference. The two 800 Hz sources were frequency locked but not phase locked, and the small random phase variations made it appear as though the antenna was rapidly "dithering" in position even though it was completely stationary. These phantom movements generated the rapid series of cycle steals.
00404 error code
The computer's other error codes included error
00404, which was shorthand for "IMU orientation unknown". Since the
Inertial Measurement UnitAn inertial measurement unit, or IMU, is an electronic device that measures and reports on a craft's velocity, orientation, and gravitational forces, using a combination of accelerometers and gyroscopes. IMUs are typically used to maneuver aircraft, including UAVs, among many others, and...
device literally told the craft where to go, this has been compared to the HTTP 404
not found or
browser navigation error code used on the
World Wide WebThe World Wide Web is a system of interlinked hypertext documents accessed via the Internet...
. However, the later familiar HTTP error code did not originate with the AGC.
Applications outside Apollo
The AGC formed the basis of an experimental
fly-by-wireFly-by-wire is a system that replaces the conventional manual flight controls of an aircraft with an electronic interface. The movements of flight controls are converted to electronic signals transmitted by wires , and flight control computers determine how to move the actuators at each control...
(FBW) system installed into an
F-8 CrusaderThe Vought F-8 Crusader was a single-engine, supersonic, carrier-based air superiority jet aircraft built by Vought for the United States Navy and the U.S. Marine Corps, replacing the Vought F7U Cutlass...
to demonstrate the practicality of computer driven FBW. The AGC used in the first phase of the program was replaced with another machine in the second phase, and research done on the program led to the development of FBW systems for the
Space ShuttleThe Space Shuttle was a manned orbital rocket and spacecraft system operated by NASA on 135 missions from 1981 to 2011. The system combined rocket launch, orbital spacecraft, and re-entry spaceplane with modular add-ons...
. The AGC also led, albeit indirectly, to the development of FBW for the generation of fighters that were being developed at the time.
The AGC was also used for the U.S. Navy's
Deep Submergence Rescue VehicleA Deep Submergence Rescue Vehicle is a type of Deep Submergence Vehicle used for rescue of downed submarines and clandestine missions. While DSRV is the term most often used by the United States Navy other nations have different designations for their vehicles.- Chinese models :The People's...
(DSRV)
See also
- Apollo PGNCS
The Apollo Primary Guidance, Navigation and Control System was a self-contained inertial guidance system that allowed Apollo spacecraft to carry out their missions when communications with Earth were interrupted, either as expected, when the spacecraft were behind the moon, or in case of a...
- the Apollo Primary Guidance and Navigation System
- AP-101 (IBM S/360-derived) computers used in the Space Shuttle
NASA's Space Shuttle program, officially called Space Transportation System , was the United States government's manned launch vehicle program from 1981 to 2011...
- History of computer hardware
The history of computing hardware starting at 1960 is marked by the conversion from vacuum tube to solid state devices such as the transistor and later the integrated circuit. By 1959 discrete transistors were considered sufficiently reliable and economical that they made further vacuum tube...
Documentation on the AGC and its development
- AGC4 Memo #9, Block II Instructions – The infamous memo that served as de facto official documentation of the instruction set
- Computers in Spaceflight: The NASA Experience – By James Tomayko (Chapter 2, Part 5, The Apollo guidance computer: Hardware)
- Computers Take Flight – By James Tomayko
- The Apollo Guidance Computer - A Users View (PDF
Portable Document Format is an open standard for document exchange. This file format, created by Adobe Systems in 1993, is used for representing documents in a manner independent of application software, hardware, and operating systems....
) – By David Scott, Apollo mission astronaut
- Lunar Module Attitude Controller Assembly Input Processing (PDF
Portable Document Format is an open standard for document exchange. This file format, created by Adobe Systems in 1993, is used for representing documents in a manner independent of application software, hardware, and operating systems....
) – By José Portillo Lugo, History of Technology
- The MIT AGC Project – With comprehensive document archive
- National Air and Space Museum's AGC Block I and Dsky
- Annotations to Eldon Hall's Journey to the Moon – An AGC system programmer discusses some obscure details of the development of AGC, including specifics of Ed's Interrupt
Documentation of AGC hardware design, and particularly the use of the new integrated circuits in place of transistors
Documentation of AGC software operation
- Delco Electronics, Apollo 15 - Manual for CSM and LEM AGC software used on the Apollo 15 mission, including detailed user interface procedures, explanation of many underlying algorithms and limited hardware information. Note that this document has over 500 pages and is over 150 megabytes in size.
Some AGC-based projects and simulators
- AGC Replica – John Pultorak's successful project to build a hardware replica of the Block I AGC in his basement. Mirror site: AGC Replica.
- Virtual AGC Home Page – Ronald Burkey's AGC simulator, plus source and binary code recovery for the Colossus (CSM) and Luminary (LEM) SW
- Project Apollo for Orbiter – Addon for Orbiter spaceflight simulator, working towards a full simulation of the CSM and LEM including the Virtual AGC.
- Eagle Lander 3D Shareware Lunar Lander Simulator with a working AGC and DSKY (Windows only)
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