In electronics, an

**adder** or

**summer** is a

digital circuitDigital electronics represent signals by discrete bands of analog levels, rather than by a continuous range. All levels within a band represent the same signal state...

that performs

additionAddition is a mathematical operation that represents combining collections of objects together into a larger collection. It is signified by the plus sign . For example, in the picture on the right, there are 3 + 2 apples—meaning three apples and two other apples—which is the same as five apples....

of numbers.

In many

computerA computer is a programmable machine designed to sequentially and automatically carry out a sequence of arithmetic or logical operations. The particular sequence of operations can be changed readily, allowing the computer to solve more than one kind of problem...

s and other kinds of processors, adders are used not only in the

arithmetic logic unitIn computing, an arithmetic logic unit is a digital circuit that performs arithmetic and logical operations.The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers...

(s), but also in other parts of the processor, where they are used to calculate addresses, table indices, and similar.

Although adders can be constructed for many numerical representations, such as

binary-coded decimalIn computing and electronic systems, binary-coded decimal is a digital encoding method for numbers using decimal notation, with each decimal digit represented by its own binary sequence. In BCD, a numeral is usually represented by four bits which, in general, represent the decimal range 0 through 9...

or

excess-3Excess-3 binary-coded decimal ' or Stibitz code, also called biased representation or Excess-N, is a complementary BCD code and numeral system it is used on some older computers that uses a pre-specified number N as a biasing value. It is a way to represent values with a balanced number of positive...

, the most common adders operate on

binaryThe binary numeral system, or base-2 number system, represents numeric values using two symbols, 0 and 1. More specifically, the usual base-2 system is a positional notation with a radix of 2...

numbers.

In cases where

two's complementThe two's complement of a binary number is defined as the value obtained by subtracting the number from a large power of two...

or ones' complement is being used to represent negative numbers, it is trivial to modify an adder into an adder–subtractor.

Other

signed number representationsIn computing, signed number representations are required to encode negative numbers in binary number systems.In mathematics, negative numbers in any base are represented by prefixing them with a − sign. However, in computer hardware, numbers are represented in binary only without extra...

require a more complex adder.

## Half adder

A

**half adder** adds two one-bit binary numbers

*A* and

*B*. It has two outputs,

*S* and

*C* (the value theoretically carried on to the next addition); the final sum is . The simplest half-adder design, pictured on the right, incorporates an

XOR gateThe XOR gate is a digital logic gate that implements an exclusive or; that is, a true output results if one, and only one, of the inputs to the gate is true . If both inputs are false or both are true , a false output results. Its behavior is summarized in the truth table shown on the right...

for

*S* and an

AND gateThe AND gate is a basic digital logic gate that implements logical conjunction - it behaves according to the truth table to the right. A HIGH output results only if both the inputs to the AND gate are HIGH . If neither or only one input to the AND gate is HIGH, a LOW output results...

for

*C*. Half adders cannot be used compositely, given their incapacity for a carry-in bit.

## Full adder

A

**full adder** adds binary numbers and accounts for values carried in as well as out. A one-bit full adder adds three one-bit numbers, often written as

*A*,

*B*, and

*C*_{in};

*A* and

*B* are the operands, and

*C*_{in} is a bit carried in (in theory from a past addition). The circuit produces a two-bit output sum typically represented by the signals

*C*_{out} and

*S*, where

. The one-bit full adder's

truth tableA truth table is a mathematical table used in logic—specifically in connection with Boolean algebra, boolean functions, and propositional calculus—to compute the functional values of logical expressions on each of their functional arguments, that is, on each combination of values taken by their...

is:

Inputs | Outputs |

*A* | *B* | *C*_{in} | *C*_{out} | *S* |

0 |
0 |
0 |
0 |
0 |

1 |
0 |
0 |
0 |
1 |

0 |
1 |
0 |
0 |
1 |

1 |
1 |
0 |
1 |
0 |

0 |
0 |
1 |
0 |
1 |

1 |
0 |
1 |
1 |
0 |

0 |
1 |
1 |
1 |
0 |

1 |
1 |
1 |
1 |
1 |

A full adder can be implemented in many different ways such as with a custom

transistorA transistor is a semiconductor device used to amplify and switch electronic signals and power. It is composed of a semiconductor material with at least three terminals for connection to an external circuit. A voltage or current applied to one pair of the transistor's terminals changes the current...

-level circuit or composed of other gates. One example implementation is with

and

.

In this implementation, the final

OR gateThe OR gate is a digital logic gate that implements logical disjunction - it behaves according to the truth table to the right. A HIGH output results if one or both the inputs to the gate are HIGH . If neither input is HIGH, a LOW output results...

before the carry-out output may be replaced by an

XOR gateThe XOR gate is a digital logic gate that implements an exclusive or; that is, a true output results if one, and only one, of the inputs to the gate is true . If both inputs are false or both are true , a false output results. Its behavior is summarized in the truth table shown on the right...

without altering the resulting logic. Using only two types of gates is convenient if the circuit is being implemented using simple IC chips which contain only one gate type per chip. In this light, C

_{out} can be implemented as

.

A full adder can be constructed from two half adders by connecting

*A* and

*B* to the input of one half adder, connecting the sum from that to an input to the second adder, connecting

*C*_{i} to the other input and OR the two carry outputs. Equivalently,

*S* could be made the three-bit XOR of

*A*,

*B*, and

*C*_{i}, and

*C*_{out} could be made the three-bit

majority functionIn Boolean logic, the majority function is a function from n inputs to one output. The value of the operation is false when n/2 or more arguments are false, and true otherwise....

of

*A*,

*B*, and

*C*_{i}.

### Ripple carry adder

It is possible to create a logical circuit using multiple full adders to add

*N*-bit numbers. Each full adder inputs a

*C*_{in}, which is the

*C*_{out} of the previous adder. This kind of adder is a

*ripple carry adder*, since each carry bit "ripples" to the next full adder. Note that the first (and only the first) full adder may be replaced by a half adder.

The layout of a ripple carry adder is simple, which allows for fast design time; however, the ripple carry adder is relatively slow, since each full adder must wait for the carry bit to be calculated from the previous full adder.

The gate delay can easily be calculated by inspection of the full adder circuit.

Each full adder requires three levels of logic. In a 32-bit [ripple carry] adder, there are 32 full adders, so the critical path (worst case) delay is 3 (for carry propagation in first adder) + 31 * 2 (for carry propagation in later adders) = 65 gate delays.

### Carry-lookahead adders

To reduce the computation time, engineers devised faster ways to add two binary numbers by using carry-lookahead adders.

They work by creating two signals (

*P* and

*G*) for each bit position, based on if a carry is propagated through from a less significant bit position (at least one input is a '1'), a carry is generated in that bit position (both inputs are '1'), or if a carry is killed in that bit position (both inputs are '0'). In most cases,

*P* is simply the sum output of a half-adder and

*G* is the carry output of the same adder. After

*P* and

*G* are generated the carries for every bit position are created. Some advanced carry-lookahead architectures are the Manchester carry chain, Brent–Kung adder, and the Kogge–Stone adder.

Some other multi-bit adder architectures break the adder into blocks. It is possible to vary the length of these blocks based on the

propagation delayPropagation delay is a technical term that can have a different meaning depending on the context. It can relate to networking, electronics or physics...

of the circuits to optimize computation time. These block based adders include the

carry bypass adderA carry-bypass adder is an adder implementatin that improves on the delay of a ripple-carry adder.The two addends are split in blocks of n bits. The output carry of each block is dependent on the input carry only if, for each of the n bits in the block, at least one addend has a 1 bit...

which will determine

*P* and

*G* values for each block rather than each bit, and the

carry select adderIn electronics, a carry-select adder is a particular way to implement an adder, which is a logic element that computes the -bit sum of two n-bit numbers. The carry-select adder is simple but rather fast, having a gate level depth of O....

which pre-generates sum and carry values for either possible carry input to the block.

Other adder designs include the carry-save adder, carry-select adder, conditional-sum adder, carry-skip adder, and carry-complete adder.

### Lookahead carry unit

By combining multiple carry lookahead adders even larger adders can be created.

This can be used at multiple levels to make even larger adders.

For example, the following adder is a 64-bit adder that uses four 16-bit CLAs with two levels of LCUs.

## 3:2 compressors

We can view a full adder as a

*3:2 lossy compressor*: it sums three one-bit inputs, and returns the result as a single two-bit number; that is, it maps 8 input values to 4 output values. Thus, for example, a binary input of

*101* results in an output of

*1+0+1=10* (decimal number '2'). The carry-out represents bit one of the result, while the sum represents bit zero. Likewise, a half adder can be used as a

*2:2 lossy compressor*, compressing four possible inputs into three possible outputs.

Such compressors can be used to speed up the summation of three or more addends. If the addends are exactly three, the layout is known as the carry-save adder. If the addends are four or more, more than one layer of compressors is necessary and there are various possible design for the circuit: the most common are Dadda and

Wallace treeA Wallace tree is an efficient hardware implementation of a digital circuit that multiplies two integers, devised by an Australian Computer Scientist Chris Wallace in 1964.The Wallace tree has three steps:...

s. This kind of circuit is most notably used in multipliers, which is why these circuits are also known as Dadda and Wallace multipliers.

## See also

:Category:Adders

- Additron tube
The Additron was an electron tube designed by Dr. Josef Kates, circa 1950, to replace the several individual electron tubes and support components required to perform the function of a single bit digital full adder. Dr...

- Adding machine
An adding machine was a class of mechanical calculator, usually specialized for bookkeeping calculations.In the United States, the earliest adding machines were usually built to read in dollars and cents. Adding machines were ubiquitous office equipment until they were phased out in favor of...

- Subtractor
- Binary multiplier
A binary multiplier is an electronic circuit used in digital electronics, such as a computer, to multiply two binary numbers. It is built using binary adders....

- Serial binary adder
The serial binary adder or bit-serial adder is a digital circuit that performs binary addition bit by bit. The serial full adder has three single-bit inputs for the numbers to be added and the carry in. There are two single-bit outputs for the sum and carry out. The carry-in signal is the...

- Half subtractor

## External links