Hi, we are usiung DS90C241/DS90C124 5-35 Mhz DC- balanced 24-bit LVDS serializer deserializer from national semiconductor.

During testing we found that with clock frequency "Fclk" the maximum allowable data rate for serializer is only (1/2)*Fclk. if data rate is increased further beyond (1/2)*Fclk then the deserializer can not recover the incoming data properly.

I can't understand why is it so?

In datasheet also they have not mentioned the maximum allowable datarate.

Please solve my quary....

thank you,

vishal.